29 UART and RS-232 Protocols

29.2 Overview: UART Sends Bytes Without A Clock Wire

UART is the simple asynchronous serial link used for debug consoles, GPS receivers, radio modules, bootloaders, and many board-to-board IoT connections. One wire transmits, one wire receives, and a shared ground gives both devices the same voltage reference.

The simplicity has a condition: both ends must already agree on baud rate, frame format, logic voltage, and flow-control behavior. UART does not carry an address, a clock, or a built-in retry scheme, so wiring and configuration mistakes show up as silence or garbled characters.

The design boundary is the important lesson. A microcontroller UART peripheral defines byte timing and framing; it does not define connector shape, cable robustness, message boundaries, or safe voltage levels. TTL UART on a board may idle at 3.3 V or 5 V logic. RS-232 inverts the logic and uses higher positive and negative voltages through a transceiver. RS-485 can carry UART-style bytes over a differential multidrop electrical layer, but then direction control, termination, and bus ownership become part of the release record.

For IoT products, UART is strongest as a local service, configuration, or module link: a boot console, GPS NMEA stream, AT-command modem, serial sensor, or factory programming port. It becomes fragile when teams treat it as a complete protocol. If bytes can be lost, delayed, or inserted during reset, the application needs explicit message framing, checksums, timeouts, retry rules, and buffer-overflow behavior above the serial link.

Figure 29.1 makes overview: uart sends bytes without a clock wire inspectable through UART structure showing transmit and receive. Those diagram labels establish the scope of uart is point-to-point: tx on one device must reach rx on the other, and both sides need a common ground.

Compare UART structure showing transmit with receive inside the visual at Figure 29.1. Next find ground, which completes the scope of uart is point-to-point: tx on one device must reach rx on the other, and both sides need a common ground. The decision in overview: uart sends bytes without a clock wire must preserve that labelled boundary.

To test overview: uart sends bytes without a clock wire, open the diagram in Figure 29.2. UART Frame Structure supplies one named condition; Asynchronous serial communication frame format supplies the necessary comparison for a receiver synchronizes on the start bit, samples the data bits by timing, optionally checks parity, then waits for the stop bit.

Locate UART Frame Structure on Figure 29.2 before checking Asynchronous serial communication frame format. The visual’s third anchor, TIMING DIAGRAM, completes a receiver synchronizes on the start bit, samples the data bits by timing, optionally checks parity, then waits for the stop bit. Carry UART Frame Structure into overview: uart sends bytes without a clock wire; use TIMING DIAGRAM as its limiting condition.

29.3 Practitioner: Keep A Serial Link Record

Before applying the specification, inspect the real db9 rs-232 connector/cable below: its package, terminals, scale, and installation context are part of the engineering evidence.

Carry those visible constraints into the surrounding analysis; the abstract symbol or capability name does not capture mounting, wiring, protection, or service access.

A dependable UART build has a short record: the electrical standard, connector or pinout, frame setting, baud rate, cable length, flow-control choice, and a known-good test message. Without that record, teams waste time swapping wires, guessing defaults, and blaming software for electrical faults.

Make the record executable. It should say exactly which endpoint is DTE or DCE when RS-232 language is used, which side of a connector drawing is shown, whether the port is 3.3 V tolerant, and whether RTS/CTS is wired or intentionally unused. If a legacy peer depends on DTR/DSR-style readiness, record whether DTR must be asserted for the whole transfer or tied through the connector; otherwise the data line can look correct while the peer refuses to send or receive. For field devices, include the installed cable length, shield or drain treatment, enclosure pass-through, and the highest sustained burst rate that the receiver can absorb without losing bytes.

To test practitioner: keep a serial link record, open the diagram in Figure 29.3. A grey serial cable ending in a nine-pin DB9 connector supplies one named condition; A DB9 serial cable is where the abstract DTE/DCE supplies the necessary comparison for a db9 serial cable is where the abstract dte/dce and pinout choices become physical. the shell orientation, male or female contact pattern,.

Compare A grey serial cable ending in a nine-pin DB9 connector with A DB9 serial cable is where the abstract DTE/DCE inside the visual at Figure 29.3. Next find pinout choices become physical, which completes the scope of a db9 serial cable is where the abstract dte/dce and pinout choices become physical. the shell orientation, male or female contact pattern,. The decision in practitioner: keep a serial link record must preserve that labelled boundary.

The visual evidence for practitioner: keep a serial link record sits in Figure 29.4. Find RS-232 Voltage Levels beside +15V before interpreting rs-232 uses inverted high-voltage signaling; it must be translated before it reaches normal 3.3 v or 5 v microcontroller uart pins.

At RS-232 Voltage Levels in Figure 29.4, compare the diagram with +15V; then locate +10V. That labelled check bounds rs-232 uses inverted high-voltage signaling; it must be translated before it reaches normal 3.3 v or 5 v microcontroller uart pins. For practitioner: keep a serial link record, retain +10V as evidence for the resulting choice.

Pause at Figure 29.5 before carrying practitioner: keep a serial link record forward. Its visual vocabulary joins RS-232 Serial Cable to DB-9 Null Modem Connection, which frames connector diagrams must state the viewing side. mirrored db9 views are a common source of swapped tx/rx pins.

Begin Figure 29.5 with RS-232 Serial Cable, then distinguish DB-9 Null Modem Connection and DB-9 Female. The diagram separates RS-232 Serial Cable from DB-9 Null Modem Connection within connector diagrams must state the viewing side. mirrored db9 views are a common source of swapped tx/rx pins. Keep both distinctions explicit in practitioner: keep a serial link record.

RS-232's mark and space levels are inverted and much wider than logic levels: a logic 1 ("mark") is a negative voltage between -3 V and -25 V, and a logic 0 ("space") is a positive voltage between +3 V and +25 V. Most PC-era transceivers settled on roughly ±13 V -- well inside spec, and far outside anything a 3.3 V or 5 V microcontroller pin should ever see directly. Distance matters too: RS-232's original point-to-point spec targets around 15 m of cable before the signal degrades past use, while a same-generation USB link only covers about 3-5 m before it needs a powered hub or repeater -- another reason cable length belongs in the wiring record even when two links both look like "just serial."

The RTS/CTS/DTR handshake this chapter's ledger asks about follows a fixed order, not just a wired-or-unwired checkbox. The DTE raises RTS to request to send; the DCE answers by raising CTS once it can accept bytes; the DTE then raises DTR and holds it asserted for the whole transfer to show the terminal itself is ready; only after that sequence completes does the data line idle and the first start bit appear. A bring-up capture that shows RTS, CTS, and DTR reaching their ON state in that order -- not just their final logic levels -- is the evidence that a hardware-handshake link will actually move data, not only that the handshake pins are wired.

29.4 Under The Hood: Timing Error Accumulates Across The Frame

UART receivers usually resynchronize on the start edge, then sample near the center of each bit period. Because there is no shared clock, any transmitter and receiver timing error accumulates until the frame ends. Longer frames, poor oscillators, noisy edges, and high baud rates all reduce the margin.

A receiver commonly oversamples the line, detects the falling start edge, waits toward the center of the first data bit, and then samples each following bit at the configured interval. If the local clock is too fast or too slow, those sample points drift. In an 8N1 frame the receiver only needs to stay aligned for one start bit, eight data bits, and one stop bit, then it can resynchronize on the next start bit. That is why moderate clock error can work for short frames but fail with long words, parity, two stop bits, or marginal edges.

To test under the hood: timing error accumulates across the frame, open the diagram in Figure 29.6. USB vs RS-232 supplies one named condition; USB supplies the necessary comparison for asynchronous serial links depend on both endpoints keeping close enough timing until the stop bit is sampled.

Locate USB vs RS-232 on Figure 29.6 before checking USB. The visual’s third anchor, RS-232, completes asynchronous serial links depend on both endpoints keeping close enough timing until the stop bit is sampled. Carry USB vs RS-232 into under the hood: timing error accumulates across the frame; use RS-232 as its limiting condition.

In 8N1, every byte consumes 1 start bit, 8 data bits, and 1 stop bit. At 9600 baud, that gives about 960 data bytes per second before protocol overhead. At 115200 baud, the byte rate is about 11,520 bytes per second, but electrical and timing margin become more sensitive to cable and oscillator quality.

Throughput is not only baud divided by frame length. A real product may pause between messages, wake a modem, wait for line turnaround, process AT responses, or copy bytes through interrupt handlers into a ring buffer. If the consumer task stalls, bytes can overrun even when the electrical link is perfect. That is why serial diagnostics should log framing errors, parity errors, overrun counts, buffer high-water marks, and message checksum failures separately.

Before under the hood: timing error accumulates across the frame, inspect Figure 29.7: Alternative view must be considered with IoT Platform. That visual pairing grounds uart trades addressing and shared-clock features for a simple point-to-point byte stream in named evidence.

At Alternative view in Figure 29.7, compare the diagram with IoT Platform; then locate Each serial. That labelled check bounds uart trades addressing and shared-clock features for a simple point-to-point byte stream. For under the hood: timing error accumulates across the frame, retain Each serial as evidence for the resulting choice.