30 I2C: Transactions and Bus Design

networking-core

wired

comm

i2c

30.1 Overview

This section: Overview — This first route builds I2C from electrical signaling through addressed transactions and bus constraints.

This first route builds I2C from electrical signaling through addressed transactions and bus constraints.

This is part 1 of 2. Continue with I2C: Bring-Up and Diagnosis for the second focused route.

30.2 Start With Many Chips Sharing Two Wires

This section: Start With Many Chips Sharing Two Wires — Picture three sensors sharing two wires until adding a fourth makes every reading stop.

Find the First Device Holding the Shared Bus

Picture three sensors sharing two wires until adding a fourth makes every reading stop. A microcontroller means a small computer on one chip that starts transfers and controls the device.

Name each address, pull-up, wire length, bus voltage, clock rate, and expected reply. Test one sensor, all sensors, a duplicate address, and a device holding a line low.

Keep the wiring, settings, address scan, signal edges, acknowledgements, and failure time. This proves one local bus setup, not every board layout; the deeper sections explain transfers, electrical limits, timing, arbitration, and recovery.

I2C is useful because one controller can talk to many nearby devices using only SDA and SCL. The shared bus works only when addresses, pull-ups, capacitance, timing, and acknowledgements all stay inside the design limits.

Follow one read from controller to sensor and back. The story shows why a missing ACK, slow edge, duplicate address, or stretched clock is not a mystery; it is a specific bus promise being broken.

Key Concepts

I²C (Inter-Integrated Circuit): A two-wire synchronous serial bus using SDA (data) and SCL (clock) lines; supports multiple devices on the same bus with unique 7-bit or 10-bit addresses
Master/Slave Architecture: I²C uses a master device (typically a microcontroller) that initiates all transactions and one or more slave devices (sensors, ADCs) that respond
Open-Drain Signalling: I²C lines are open-drain; devices can only pull the line low; pull-up resistors (typically 4.7 kΩ) bring the line high when released
Address Conflict: Two I²C devices with the same address on the same bus cause communication failures; I²C address is typically fixed in hardware or set by address pins
Clock Stretching: A mechanism where a slave device holds SCL low to pause the master, giving the slave more time to prepare data
I²C Speed Modes: Standard mode (100 kbps), Fast mode (400 kbps), Fast-mode Plus (1 Mbps), High-speed mode (3.4 Mbps)
I²C Multiplexer: A device (e.g., TCA9548A) that allows multiple devices with the same I²C address to coexist on one bus by switching between sub-buses

30.3 In 60 Seconds

I2C (Inter-Integrated Circuit) is a two-signal-wire synchronous bus using SDA (data) and SCL (clock) with pull-ups. Seven-bit addressing provides 112 non-reserved address values out of 128; the practical device count is lower and depends on address conflicts and electrical loading. Standard-mode reaches 100 kHz, Fast-mode 400 kHz, Fast-mode Plus 1 MHz, and High-speed mode 3.4 MHz when all devices support the chosen mode. I2C often connects nearby sensors and displays with few controller pins. Common issues include address conflicts, missing pull-ups, and unsupported clock stretching.

Phoebe’s Field Notes: The Voltage Divider Hiding Inside The Pull-Up Spec

The mathematical gist. At a specified operating point of 0.4 V LOW and 3 mA sink current, an illustrative linear equivalent is 0.4 V / 0.003 A = 133 Ω. In that simplified divider, a 967 Ω pull-up gives about 0.400 V LOW and a 4.7 kΩ pull-up gives about 0.091 V, or 0.309 V below the limit. A real output transistor is not a fixed resistor: use the device’s rated LOW voltage and sink-current limits, not the divider prediction, to approve the pull-up.

30.4 Learning Objectives

This section: Learning Objectives

Explain I2C Architecture: Describe the two-wire bus structure with SDA and SCL, and justify why open-drain outputs require pull-up resistors
Calculate Pull-Up Resistor Values: Apply the RC rise-time formula to select appropriate resistor values for a given bus capacitance and speed mode
Distinguish I2C Addressing: Identify how 7-bit addresses map to write and read bytes, and select device addresses to avoid bus conflicts
Implement I2C Transactions: Explain the read and write transaction sequences (START, address frame, ACK, data, STOP) and translate them into test steps
Diagnose I2C Failures: Analyze bus-level symptoms — missing ACK, slow rise times, address conflicts, clock stretching — and identify their root causes
Build I2C Applications: Plan and verify sensor/display connections over a shared I2C bus before writing firmware

For Beginners: The I2C Protocol

I2C (pronounced eye-squared-see) is a simple way to connect multiple sensors and chips using just two wires. Think of it as a shared phone line where each device has its own phone number — the main controller calls each device by its address and they take turns sharing information. It is one of the most common ways to connect sensors in IoT projects.

I2C Wiring, Addressing, and Pull-Up Resistors

“I love I2C!” said Temperature Terry. “I need just two signal wires — SDA for data and SCL for the clock — plus power and ground. Up to 112 of us can share those wires (fewer in practice)!”

the microcontroller explained how it works. “I am the master. When I want Sammy’s temperature reading, I send his address — say 0x48 — on the bus. Only Sammy responds. Then I send a request, and he sends back the data. Everyone else stays quiet because it was not their address.”

“The pull-up resistors are super important though,” warned the LED. “The wires need them to work properly. If you forget the pull-ups, nothing talks! It is the number one beginner mistake with I2C. And sometimes two sensors accidentally have the SAME address — then you get conflicts.”

“I2C is not the fastest,” admitted the battery, “only 100 to 400 kHz for most IoT work. But it is incredibly simple — just two wires for dozens of sensors! Perfect for when you have a temperature sensor, a humidity sensor, a pressure sensor, and a display all connected to one microcontroller. Minimal wiring, maximum flexibility.”

30.5 Prerequisites

This section: Prerequisites

Before diving into this chapter, you should be familiar with:

Wired Communication Fundamentals: Understanding of synchronous communication, multi-drop topology, master-slave architecture
Digital Electronics: Understanding of open-drain outputs and pull-up resistors

Chapter Roadmap

Follow one shared I2C bus from wiring to release:

First identify why SDA, SCL, open-drain outputs, and pull-ups make many devices share two wires.
Then map each device to a unique address and translate the 7-bit address into write and read bytes.
Next walk the START, ACK, repeated START, data, and STOP sequence that makes a real transaction work.
After that use scanner and BME280 labs to turn bus symptoms into evidence.
Finally calculate pull-up limits and build a reliability record for speed, capacitance, lockup, and recovery.

Checkpoints recap the main design decisions; collapsed material deepens the same path.

30.6 I2C Overview

This section: I2C Overview — Start with the physical promise: every device sees the same two wires, so the bus only works if each participant releases the lines and waits its turn.

Start with the physical promise: every device sees the same two wires, so the bus only works if each participant releases the lines and waits its turn.

I2C (IIC, I-squared-C) is a popular multi-device communication bus developed by Philips (now NXP) in the 1980s.

Pronunciation: “I-squared-C” or “I-two-C”

Full name: Inter-Integrated Circuit

30.6.1 Characteristics

Feature	Value
Signal wires	2 (SDA + SCL; power and ground are also needed)
Topology	Multi-drop (bus)
Sync/Async	Synchronous (SCL = clock)
Duplex	Half-duplex (SDA is bidirectional)
Speed	100 kHz (standard), 400 kHz (fast), 1 MHz (fast+), 3.4 MHz (high-speed)
Distance	Typically < 1 m (same PCB or short cable); longer runs need lower speed or bus buffers.
Address values	112 non-reserved ordinary 7-bit values; 10-bit addressing has 1024 values. Practical device count is limited by loading and address conflicts.
Master/Slave	Multi-master capable

Trace each line in Figure 30.1 from one end of the bus to the other before you add a device to a real board.

I2C bus connections link a RasPi master with DAC, ADC and Arduino slave devices on SDA, SCL and GND. Two 1K5 pull-ups reach VCC for the two-wire serial interface. — Figure 30.1: Physical I2C wiring: two lines (SDA and SCL) run across all devices on the bus. Pull-up resistors hold both lines HIGH by default; any device can pull a line LOW using its open-drain output.

Four boards hang off the same two wires: a Raspberry Pi as controller, and a DAC, an ADC and an Arduino as devices. SDA and SCL run straight past all of them, and a ground line runs with them, which is easy to forget on a long lead. Near the supply rail sit two 1K5 pull-up resistors, one per line. They are the reason the bus idles high. Every device drives low only, so any one of them can pull a line down without fighting another. Figure 30.1 shows the full electrical cost of adding a device: two shared wires, one ground, and one pair of pull-ups for the whole bus.

30.7 Why I2C is Popular

This section: Why I2C is Popular

Advantages:

Only 2 wires (minimal pin usage)
Multiple devices on same bus
Simple addressing (each device has unique address)
Bidirectional (master can read/write to slaves)
Well-supported by sensors, displays, EEPROMs

30.8 I2C Signals

This section: I2C Signals — Look at where the pull-ups attach in Figure 30.2, because that placement is what makes the shared lines work.

Look at where the pull-ups attach in Figure 30.2, because that placement is what makes the shared lines work.

I2C bus wiring connects a master MCU to sensor A at address 0x48 and sensor B at address 0x76. SDA and SCL each have a pull-up to Vcc. — Figure 30.2: I2C Bus Wiring with Pull-Up Resistors

The controller on the left drives SDA and SCL, and both lines run on to two sensors, one at address 0x48 and one at 0x76. Each line has its own pull-up to Vcc, drawn between the controller and the sensors rather than at any single device. That is deliberate. The resistors belong to the bus, not to a board, so adding a third sensor adds no more of them. The two addresses in Figure 30.2 carry the other rule. The wires are shared by everyone, so the address is the only thing that decides which device is being spoken to.

SDA (Serial Data):

Bidirectional data line
Carries address and data
Open-drain (requires pull-up resistor)

SCL (Serial Clock):

Clock signal from master
Slaves can hold it LOW (“clock stretching”) to slow master
Open-drain (requires pull-up resistor)

30.9 Pull-Up Resistors

This section: Pull-Up Resistors — Treat pull-up selection as a bounded electrical calculation.

Treat pull-up selection as a bounded electrical calculation. Start with the highest resistor that still charges the measured bus capacitance within the mode’s rise-time limit, then check the lowest resistor that every connected device can safely pull below the permitted low-level voltage. Compare the resulting window with the fitted value, not with a universal favourite. A 4.7 kΩ part is common because it often fits short 100 kHz or 400 kHz boards, but cable length, device count, level shifting, and breadboard capacitance can move the valid window. Verify the decision on SDA and SCL with an oscilloscope at the intended clock rate.

Critical requirement: Both SDA and SCL need pull-up resistors to VCC.

Typical values:

4.7 kohm - Most common (400 kHz, few devices, short traces)
2.2 kohm - For longer cables, many devices, or fast mode
10 kohm - For very short cables, few devices, 100 kHz only

Why needed? I2C uses open-drain outputs - can only pull LOW, not HIGH. Pull-up resistors provide the HIGH level. See the detailed calculation in the Worked Example section for guidance on choosing the right value.

Packet Pete, Networking and packet-journey domain expert

Checkpoint: Shared Bus Basics

You now know:

I2C gets its pin savings from two shared lines, SDA and SCL, rather than one private wire per peripheral.
Open-drain signalling means devices pull low or release; pull-up resistors create the high level.
That same sharing makes capacitance, pull-up strength, and bus length design constraints.

The wiring is only half the contract. Once every device is attached to SDA and SCL, the controller still needs a way to choose exactly one responder.

30.10 I2C Addressing

This section: I2C Addressing — Each device on the bus needs a unique 7-bit address.

Each device on the bus needs a unique 7-bit address.

Address space:

7-bit addresses: 0x08 to 0x77 (112 addresses)
Some addresses reserved (0x00-0x07, 0x78-0x7F)

Common I2C device addresses:

Device	Address (Hex)	Address (Decimal)
OLED Display (SSD1306)	0x3C or 0x3D	60 or 61
BME280 (Temp/Humidity)	0x76 or 0x77	118 or 119
MPU6050 (IMU)	0x68 or 0x69	104 or 105
RTC DS3231	0x68	104
EEPROM 24C256	0x50 - 0x57	80 - 87

Try It: I2C Address Frame Decoder

Finding device addresses:

Optional I2C Scanner Checklist

Use an I2C scanner when a board powers up but a sensor library cannot find its device.

Step	What you check	Expected evidence
1. Power and ground	Sensor VCC and GND match the controller voltage	Sensor board powers on; no hot components
2. Bus wiring	SDA to SDA, SCL to SCL, shared ground	Scanner can probe the bus without lockup
3. Pull-ups	SDA and SCL have pull-ups to the correct voltage	Lines idle HIGH on a meter or oscilloscope
4. Address scan	Probe addresses from `0x08` to `0x77`	Known devices appear at their documented addresses
5. Conflict check	Compare detected addresses against the design	Duplicate addresses are resolved with address pins or a mux

Example scan result:

Detected address	Likely device	What to do next
`0x3C`	OLED display	Use the OLED library with address `0x3C`.
`0x76`	BME280/BMP280	Use the sensor library with address `0x76`.
No addresses	Wiring, pull-up, or power problem	Check SDA/SCL order, VCC, ground, and pull-up resistors.

30.11 I2C Communication Protocol

This section: I2C Communication Protocol — Read the two traces in Figure 30.3 together, because on this bus the meaning of the data line depends on what the clock is doing.

Read the two traces in Figure 30.3 together, because on this bus the meaning of the data line depends on what the clock is doing.

I2C timing traces START, eight MSB-first address bits, ACK and STOP for a BME280 write. Sample SDA on SCL rising edges; START and STOP change SDA while SCL stays high. — Figure 30.3: I2C protocol timing: START and STOP conditions frame each transaction, with data sampled on SCL rising edge. The acknowledgment bit after each byte confirms successful reception.

The bus idles with both lines high. START is the exception that opens everything. SDA falls while SCL is still high, which is never allowed during data. Then eight bits go out, most significant first, and the marks show where each one is sampled, on the rising edge of the clock. Between those edges SDA may change, and during them it may not. The worked byte is 0xEC, the write address for the sensor. On the ninth clock the receiver pulls SDA low to acknowledge, and a high there would mean no device answered. STOP closes the frame in Figure 30.3 by reversing the opening move. Start and Stop Conditions:

Bus event	SDA behavior	SCL behavior	Meaning
Idle bus	HIGH	HIGH	Pull-up resistors are holding both lines released.
START	HIGH to LOW	Stays HIGH	The controller claims the bus and begins a transaction.
Data bit	Stable while sampled	Pulses LOW/HIGH	The receiver reads SDA while SCL is HIGH.
STOP	LOW to HIGH	Stays HIGH	The controller releases the bus after the transaction.

Data Transfer (1 byte + ACK):

Phase	Who drives SDA?	What the receiver checks
8 data bits	Transmitter	Bits arrive MSB first while SCL pulses.
ACK clock	Receiver	Pulls SDA LOW for ACK, leaves it HIGH for NACK.
Next byte or STOP	Controller	Continues with another byte, a repeated START, or STOP.

Data transfer rules:

During data bits, SDA changes only while SCL is low; START and STOP deliberately change SDA while SCL is high.
SDA is sampled when SCL is HIGH
Data transmitted MSB first (most significant bit first)

Use Figure 30.4 to identify the edge relationships that delimit one I2C transaction and acknowledge each byte.

Figure 30.4: I2C communication protocol timing showing complete transaction

Begin with the START condition, where SDA falls while SCL remains high; ordinary data changes occur while SCL is low so receivers can sample stable bits while it is high. Follow the address and read/write bit into the ninth clock, which carries the receiver’s acknowledgement. Data bytes repeat that eight-bit-plus-ACK pattern. The STOP condition reverses the opening relation: SDA rises while SCL is high. These rules explain why pull-ups, rise time, and stuck-low faults are part of the protocol contract, not merely wiring details.

30.12 I2C Write Transaction

This section: I2C Write Transaction — A write is a fixed sequence, and each block in it must be acknowledged before the next is allowed.

A write is a fixed sequence, and each block in it must be acknowledged before the next is allowed. Figure 30.5 puts that sequence in order.

I2C write transaction sequence diagram showing master sending START condition, 7-bit slave address with write bit (0), register address byte, data byte, each followed by slave ACK, then STOP condition — Figure 30.5: I2C Write Transaction Sequence

Read Figure 30.5 as six blocks in time order. The opening condition is a falling data line while the clock is still high, a pattern ordinary data bits never produce, so every device on the bus recognises it. Next comes the seven-bit address with a write bit, then the first acknowledgement, where the addressed device pulls the data line low to say it is there. Only after that does the controller name an internal register and send the value for it. The closing condition mirrors the opening one. This order explains most bring-up failures. A missing acknowledgement after the address means the receiver did not accept that address; one after the register byte means it did not accept that byte. Check transaction phase, device readiness, and wiring before blaming the register value.

Steps:

Master sends START
Master sends slave address + write bit (0)
Slave acknowledges (ACK)
Master sends register address
Slave ACKs
Master sends data byte
Slave ACKs
Master sends STOP

30.13 I2C Read Transaction

This section: I2C Read Transaction — Follow Figure 30.6 to see why reading a register takes two addressing steps rather than one.

Follow Figure 30.6 to see why reading a register takes two addressing steps rather than one.

I2C read transaction sequence diagram showing master sending START, slave address with write bit, register address byte with ACK, then REPEATED START, slave address with read bit, slave sending data bytes, master sending NACK on last byte, then STOP condition — Figure 30.6: I2C Read Transaction with Restart Condition

The sequence opens like a write. START, then the device address with the write bit, then the register the controller wants. At that point the controller has said what to read but has not read anything. Instead of stopping, it issues a repeated START, which keeps the bus and stops another controller taking over between the two halves. The address goes out again, now with the read bit, and the device returns the byte. The controller ends with a NACK and then STOP, which tells the device not to send more. Figure 30.6 is one transaction, not two, and that is what protects the register selection.

Packet Pete: Pete opens the shared two-wire lane and brings an address token with a write arrow to the sensor. — CW-0026 walkthrough: A register read starts in write direction to select the register, turns around with a repeated start, reads data, then ends with a final refusal and stop.

Packet Pete: The sensor returns a small receipt; Pete follows with one register-drawer token. — CW-0026 walkthrough: A register read starts in write direction to select the register, turns around with a repeated start, reads data, then ends with a final refusal and stop.

The steps below spell out the same transaction that Figure 30.6 draws, in the order a controller issues them.

Steps:

Master sends START
Master sends slave address + write bit (0)
Slave ACKs
Master sends register address to read from
Slave ACKs
Master sends REPEATED START (restart without releasing bus)
Master sends slave address + read bit (1)
Slave ACKs
Slave sends data byte(s); master ACKs each except the last
Master sends NACK on final byte (signals end of read)
Master sends STOP

The Repeated START (step 6) is essential: it lets the master switch from write mode (selecting the register) to read mode (receiving data) without another device claiming the bus in between.

This section:

Checkpoint: Addressed Transactions

You now know:

A normal 7-bit bus uses usable addresses from 0x08 to 0x77, so duplicate module defaults must be planned before wiring.
Address 0x76 becomes 0xEC for the write phase and 0xED for the read phase because the direction bit is part of the first bus byte.
A register read is a two-phase exchange: write the register pointer, issue repeated START, then read the returned data before STOP.

This section: — With the bus grammar in place, the next question is practical: can the real board prove that those frames are reaching real devices?

With the bus grammar in place, the next question is practical: can the real board prove that those frames are reaching real devices?

30.14 Arduino/ESP32 I2C Example

This section: Arduino/ESP32 I2C Example — The transaction diagrams and address explorer above are the beginner path.

The transaction diagrams and address explorer above are the beginner path. Use this sketch only when you are ready to test a real I2C sensor.

Optional MPU6050 Build Checklist

Look at the blue sensor board before the build checklist. The edge labels show VCC, GND, SCL, and SDA, with other pins beside them and a mounting hole near each end.

Real photograph of mpu6050 6-axis imu (accelerometer + gyroscope) — This real example (GY-521 MPU-6050 Module 3 Axis Gyroscope + Accelerometer 0487) shows a physical form of mpu6050 6-axis imu (accelerometer + gyroscope). Use the visible package, interfaces, scale, mounting, and surrounding context as evidence; a catalogue label alone does not establish deployment fit. Photo: Nevit Dilmen (talk); CC BY-SA 3.0

Use the visible labels to locate the four basic connections, then confirm the board’s voltage and pinout from its specification before powering it. The photo cannot prove the installed wiring or the scanner result; the checklist below supplies those tests.

Task	I2C concept being tested	Success evidence
Wire SDA/SCL correctly	Shared two-wire bus	Scanner detects `0x68` or `0x69`.
Wake the sensor	Write transaction to a control register	The device stops reporting sleep/default values.
Select the X-axis register	Write phase before a register read	Logic trace shows address + write, register byte, repeated START.
Read two data bytes	Repeated START and read phase	Two bytes arrive and combine into a signed acceleration value.
Repeat slowly first	Stable bus before performance tuning	Values update without missing ACKs or bus lockups.

Before wiring anything, it helps to recognise the board this checklist assumes. Figure 30.7 shows one, with every pin you will touch printed beside it.

A small blue GY-521 breakout board carrying an MPU6050 6-axis motion sensor chip, with a row of pin headers along one edge — Figure 30.7: A GY-521 breakout carrying the MPU6050 – the board this checklist wires up. The scanner step above is checking for exactly this chip’s I2C address, 0x68 by default or 0x69 with AD0 pulled high. Photo: Nevit Dilmen, CC BY-SA 3.0

Read the printed labels down the left edge of Figure 30.7. Power and ground come first, then SCL and SDA, the only two signal wires this bus needs and the pair the scanner step drives. Four pins further down are the ones beginners mis-wire. XDA and XCL are a second bus for an extra sensor, not spares for the first. AD0 is the address select: leave it alone and the chip answers at 0x68, pull it high and it answers at 0x69, which is exactly the difference the scanner reports. The chip in the middle carries its own part number, so a board can be identified from a photo before any code runs.

ESP32 wiring reference:

ESP32 pin	Sensor pin	Note
GPIO 21	SDA	Data line; add a pull-up if the sensor board lacks one.
GPIO 22	SCL	Clock line; keep wires short for reliable fast mode.
3.3 V	VCC	Match the sensor module voltage.
GND	GND	All I2C devices need a shared ground.

30.15 Clock Stretching

This section: Clock Stretching — Problem: Slave needs more time to process data.

Problem: Slave needs more time to process data.

Solution: Slave holds SCL LOW to pause communication.

Step	What happens on SCL	What the controller should do
Controller releases SCL	SCL should rise HIGH	Wait for the line to actually go HIGH.
Device needs more time	Device holds SCL LOW	Do not force the next clock edge.
Device finishes processing	Device releases SCL	Resume the transaction.
Timeout exceeded	SCL remains LOW too long	Reset or recover the bus.

Use case: Slow sensors (temperature readings take time), EEPROM write operations.

This section:

Practical Tips

Avoiding Address Conflicts:

Check device datasheets before buying
Many sensors have address select pins (A0, AD0) to change address
Use I2C scanner sketch to verify addresses
Plan device selection to avoid conflicts

Common Conflicts:

0x68: MPU6050, DS1307/DS3231 RTC → Use MPU6050 AD0 pin for 0x69
0x76/0x77: BMP280, BME280, BME680 → Use SDO pin
0x27/0x3F: LCD backpack modules → Check board

Pull-up Resistors:

4.7k: Most common (400 kHz)
2.2k: Long cables or many devices
10k: Short cables, few devices

Putting Numbers to It

Pull-up resistor values aren’t arbitrary—they’re calculated from RC time constant requirements.

For I2C Fast-mode (400 kHz), the specified rise time from 30% to 70% of VCC must be no more than 300 ns. For this illustrative bus with $C_{bus} = 50$ pF (three devices plus PCB traces):

$t_r = 0.8473 \times R_{pull} \times C_{bus}$

Solving for maximum resistance:

Step	Value
Rise-time limit	300 ns
Bus capacitance	50 pF
Maximum pull-up	300 ns ÷ (0.8473 × 50 pF) = 7,080 Ω

The I2C spec also requires minimum current drive capability of 3 mA at 0.4 V LOW level for Standard/Fast-mode (UM10204 Table 10). With a 3.3 V supply:

Step	Value
Available voltage across pull-up	3.3 V - 0.4 V = 2.9 V
Allowed sink current	3 mA
Minimum pull-up	2.9 V ÷ 0.003 A = 967 Ω

This gives a range of 967 Ω to 7,080 Ω for this 50 pF bus. The standard 4.7 kΩ falls well within this range, which is why it works for most short buses. With 100 pF bus capacitance, the maximum drops to about 3.54 kΩ, so use 2.2–3.3 kΩ.

This section:

30.16 Hands-On Lab: I2C Scanner

This section: Hands-On Lab: I2C Scanner — Objective: Find all I2C devices connected to your ESP32/Arduino.

Objective: Find all I2C devices connected to your ESP32/Arduino.

Optional Scanner Lab Workflow

Stage	Student action	Evidence to record
Baseline	Scan with no external sensor attached	No unexpected addresses, or only built-in board devices.
Add display	Connect SSD1306 OLED	New address appears at `0x3C` or `0x3D`.
Add sensor	Connect BME280/BMP280	New address appears at `0x76` or `0x77`.
Conflict test	Add a second device with the same address if available	Scanner still shows one address, but both devices may respond at once.
Fix	Change address pin or use an I2C multiplexer	Each device becomes uniquely selectable.

Sample scan interpretation:

Scanner output	Meaning	Next action
`0x3C`, `0x76`	OLED and BME280 are both visible	Start the sensor/display application.
Only `0x3C`	Sensor not responding	Check BME280 power, SDA/SCL order, and address pin.
No addresses	Bus-level fault	Check pull-ups, ground, VCC, and whether SDA/SCL are swapped.

30.17 Hands-On Lab: BME280 Temperature Sensor

This section: Hands-On Lab: BME280 Temperature Sensor — Objective: Read temperature from BME280 sensor via I2C.

Objective: Read temperature from BME280 sensor via I2C.

The lab reads one sensor over two wires, but the board offers more than two. Figure 30.8 shows which edge belongs to this lab.

A small BME280 breakout board with a square metal-capped sensor package and a row of pin headers — Figure 30.8: A BME280 breakout board like the one this lab targets. The exposed metal-capped sensor is what the scanner below detects at 0x76 or 0x77, and the same board handles the temperature, humidity, and pressure reads this lab walks through. Photo: SparkFun Electronics, CC BY 2.0

The small metal-capped part near the centre of Figure 30.8 is the sensor itself; everything else on the red board exists to reach it. Look at the two edges. One carries just four pads: ground, 3.3 volts, and the SDA and SCL pair this lab uses. The opposite edge carries six, adding a separate clock, data in, data out and chip select, because the same part also speaks the four-wire bus covered elsewhere in this module. Choosing an edge is therefore choosing a protocol. Note too that the holes are bare. The board ships without headers, so soldering is a step the parts list has to include before any scan can succeed.

30.18 Continue to Part 2

This section: Continue to Part 2 — Continue with I2C: Bring-Up and Diagnosis.

Continue with I2C: Bring-Up and Diagnosis.

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