14 Components in Systems: Passive and Active Contracts

14.5.4 Overview: A Floating Input Is an Undefined Node

The gate of a CMOS logic input sits behind a thin insulating oxide, so the input is enormously high impedance — it senses voltage but draws almost no current (gigaohms, mostly capacitance). That is wonderful for not loading a signal, but it has a sharp edge: if you leave the input unconnected (floating), nothing defines its voltage. Stray charge, coupled noise, and nearby switching set it at random, so it can read HIGH and LOW unpredictably and even oscillate.

A pull-up resistor (to the supply) or pull-down resistor (to ground) gives the node a defined default level while remaining weak enough that an active driver can still override it. It is the bridge between "insulated, undefined" and "conductively tied to a known level."

Think of the pull resistor as a contract for every moment when no active circuit is driving the node. A push button is open most of the time, an unused MCU pin may never be driven, and an open-drain bus releases the wire between pulses. In all three cases the input needs a quiet answer before the real event arrives: idle HIGH, idle LOW, or whatever the protocol calls inactive. Without that answer, the node is an antenna and a tiny capacitor, not a logic signal.

Inspect this evidence before proceeding: the same resistor symbol can protect, sense, condition, or calibrate, so the circuit role—not the component name—explains why a pull resistor cures a floating input. Locate that role in Figure 14.1 before comparing strong and weak pull values.

In Figure 14.1, the CONDITIONING panel explicitly pairs “Pull-up/pull-down” with “Ensures clean logic levels for MCU”; its I2C: 4.7k pull-ups example shows the same idle-level contract on an open-drain bus. Contrast that with PROTECTION, where 220–330 Ω limits LED current, and SENSING, where a thermistor or LDR changes resistance with the environment. A GPIO pull resistor belongs to conditioning because it gives the high-impedance node a defined rail when no driver is active; the next sizing step decides how firmly and how quickly it does so.

The direction is a design choice, not a magic property of the input. Choose a pull-up when the normal inactive state should read HIGH, such as a button that shorts the pin to ground when pressed. Choose a pull-down when the normal inactive state should read LOW, such as a jumper or sensor output that drives HIGH only when present. Then verify the active driver can comfortably sink or source the pull current when it asserts the opposite state.

14.5.5 Practitioner: Sizing a Pull Resistor

Pull-resistor value is a balance. Too strong (small resistance) wastes current whenever a driver pulls the opposite way — a continuous I = Vcc / R flows — and can exceed what a driver is rated to sink. Too weak (large resistance) means the pull current is tiny, so the node charges its own capacitance slowly (giving soft, slow edges) and is more easily disturbed by leakage and noise.

Start from the two worst cases. In the active state, calculate the current through the pull and compare it with the switch contact, transistor, or GPIO sink/source rating. In the idle state, compare the pull current with all leakage paths that can pull the node the wrong way: input leakage, board contamination, cable leakage, ESD devices, or an unpowered peripheral. A pull that is only a few times larger than the leakage uncertainty may pass in the lab and fail in humidity, heat, or sleep mode.

Worked example — a button with a pull-up. A push button connects a 3.3 V input to ground when pressed, with a 10 kΩ pull-up to 3.3 V. Idle (button open): the pull-up holds the input at 3.3 V (HIGH) and draws essentially no current. Pressed: the button ties the node to ground (LOW) and the pull-up now passes 3.3 V / 10 kΩ = 0.33 mA to ground — small and harmless. Many microcontrollers offer configurable internal pull-ups (typically tens of kΩ) that remove the external part for exactly this job.

Now check speed. The pull resistor and the node capacitance make a simple RC edge: a larger resistor or longer cable charges more slowly. For a human button, even a slow microsecond-scale edge is usually fine because software debouncing dominates. For a shared open-drain interrupt, reset, or low-speed bus, the release edge may be part of a timing budget, so the pull must be strong enough to reach a valid logic threshold before the next sample. If low sleep current matters, document why an internal weak pull is acceptable or why the stronger external pull is worth the current.

14.5.6 Under the Hood: Why a Floating CMOS Input Runs Hot

A CMOS input stage drives a complementary pair: a p-channel transistor to the supply and an n-channel to ground. At a clean HIGH or LOW, exactly one is fully on and the other fully off, so no current flows straight through. But a floating input can drift to a mid-level voltage, where both transistors are partly on at once, opening a conducting path from supply to ground through the pair. That shoot-through current wastes power and heats the chip, on top of leaving the logic state indeterminate. Tying the input to a defined level with a pull resistor turns one transistor fully off and closes that path — the concrete reason datasheets insist unused CMOS inputs must never be left floating.

The mid-level problem is separate from ordinary input leakage. Leakage is tiny current into or out of the input pin; shoot-through is current inside the input buffer after the floating voltage lands between the LOW and HIGH thresholds. A meter may show the external pin is not connected to anything, but the silicon still sees a voltage that asks both devices to conduct. The symptom can be random interrupts, high sleep current, EMI sensitivity, or a board that behaves differently when a hand, cable, or oscilloscope probe is nearby.

The same high-impedance idea reappears as a deliberate third state: a tri-state or open-drain output can be released to high-impedance so several devices can share one wire. A shared line like that also needs a pull resistor to define its idle level whenever every driver has let go — the same defined-vs-floating principle, now on the output side.

Open-drain buses make the sizing trade visible. Any device can pull the line LOW strongly, but the pull-up is the only thing that returns the line HIGH after release. Too weak a pull-up gives slow rising edges and late HIGH recognition; too strong a pull-up makes every LOW bit burn more current and may exceed a small device's sink-current limit. Schmitt-trigger inputs can add hysteresis so slow or noisy edges do not chatter, but they do not replace the pull. They still need the node to be biased toward a real idle level.