Math Bridge: Quantisation Versus Thermal Noise

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Math BridgeSensorsStruggle-friendly runway

When ADC rounding is louder than resistor hiss

One thread from one code step to the chapter's 232.6 µV versus 0.407 µV comparison.

Phoebe, the physics guidePhoebe guides
The one targetCompare ADC quantisation with thermal noise.
The chapter case12 bits, 3.3 V, 10 kΩ, 1 kHz.
What it buys youFix the noise source that actually dominates.

A field team faces an unresolved physical question: When ADC rounding is louder than resistor hiss They must answer it before changing adc resolution in bits on the real device. Predict the direction first.

See the relationship before changing it

The figure reads from left to right. The blue card is adc resolution in bits. The middle card applies this page's relationship. The green card is code step. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This added model holds every other chapter fixture fixed, so the numeric fixture does not switch without explanation.

ADC resolution in bits changes code step An input card leads through the page relationship to the code step result. SET INPUT ONE CONTROL APPLY RULE predict calculate check units READ RESULT
Walk the arrows. Each extra bit halves q and σq, while the fixed resistor-hiss comparison stays unchanged.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline for adc resolution in bits is 12.

  2. 2

    Name the relationship. q=Vref/2^N; σq=q/√12; ratio=σq/σthermal

  3. 3

    Substitute the chapter fixture. Set adc resolution in bits to 12. The page ledger gives code step as 0.806 mV.

  4. 4

    Read the result. Keep mV beside the value. Use it only inside the technical boundary on this page.

Predict, then change adc resolution in bits

Try Predict the direction of code step. Move one control, calculate, then check your prediction.

12
Chapter baseline
Code step

Observe Each extra bit halves q and σq, while the fixed resistor-hiss comparison stays unchanged. Reset the control to 12 and compare code step.

Explain Only adc resolution in bits moves here. The other chapter fixtures remain fixed.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only adc resolution in bits moves. Field effects named in the page's technical boundary stay fixed.

Honesty note. This teaching model changes only adc resolution in bits. It replays the chapter fixture; it is not a field prediction.

1. A code is a rounded answer

An ADC divides its voltage range into steps. Every analog value inside one step receives the same digital code, leaving a rounding error between −q/2 and +q/2.

Phoebe: Resolution says how narrow the bins are. It does not say the resistor, reference, or sensor became quieter.

2. Turn a uniform error into RMS

1

Code widthq=Vref/2^N.

2

Mean squareFor a uniform error on [−q/2,+q/2], σq²=q²/12.

3

Take the square rootσq=q/√12.

3. Put the floors on one scale

A ratio says how many times larger one RMS floor is. Decibels express the ideal full-scale converter ceiling.

ratio=σq/σthermal; SNRideal=6.02N+1.76 dB

These comparisons do not make the noises identical; they only show which is larger at this design point.

4. Try the converter bits

q=Vref/2^N; σq=q/√12; ratio=σq/σthermal

TryChange the bit count while holding the chapter's 3.3 V range and 0.407 µV thermal result fixed.

Code levels
Code step
Quantisation RMS
Ratio to thermal floor
Ideal SNR ceiling

ObserveAt 12 bits, q=0.8057 mV and σq=232.6 µV, about 572× the 0.407 µV thermal floor.

ExplainEach extra bit halves q and σq, while the fixed resistor-hiss comparison stays unchanged.

Technical boundaries.

The ideal uniform-error model assumes the input moves across codes and

reference noise
Needs separate evidence
nonlinearity
Needs separate evidence
missing codes
Needs separate evidence
front-end gain
Needs separate evidence
sensor tolerance
Needs separate evidence
interference
Needs separate evidence
drift
Needs separate evidence
correlation
Needs separate evidence
Averaging only earns √N on independent random samples
Needs separate evidence

Use field evidence or a deeper model before release.

5. Work the 12-bit result

q=3.3/4096=0.8057 mV
σq=0.8057/√12=0.2326 mV=232.6 µV

The number is a noise floor, not a promise that every real converter reaches it.

6. Compare, then preserve the time axis

232.6/0.407≈572×; SNRideal=74.0 dB

The chapter's 1 kHz bandwidth separately requires at least 2 kHz sampling. More bits cannot repair aliased content, and faster sampling cannot create more amplitude codes.

7. Check yourself

Why divide q by √12?
Answer: The nearest-code error is modeled as uniform from −q/2 to +q/2, whose RMS is q/√12.
Which floor dominates this chapter's design point?
Answer: The 232.6 µV quantisation floor, about 572× the 0.407 µV thermal floor.
Would a 2 kHz sample rate remove quantisation?
Answer: No. Sampling rate controls the time axis; bit depth controls amplitude steps.
Honesty boundary.

These are the chapter inputs, worked results, and named teaching assumptions.

12-bit ADC
Digital resolution or converter setting
3.3 V reference
Voltage or voltage-step value
0.8057/0.806 mV step
Voltage or voltage-step value
232.6 µV RMS quantisation floor
Voltage or voltage-step value
10 kΩ
Resistance or impedance value
1 kHz thermal example
Named teaching assumption
0.407 µV RMS result
Voltage or voltage-step value
about 572× ratio
Percentage, ratio, or gain
74.0 dB ceiling
Gain, loss, margin, or level ratio
2 kHz Nyquist floor come from the chapter
Frequency, sample rate, or event rate

The ideal model is not a complete converter noise budget.

Return to the chapter with the maths unpacked →