Math Bridge: I2C Rise Time

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Math BridgeSensorsStruggle-friendly runway

Why bus capacitance forces a smaller I2C pull-up

One thread from an open-drain line to the chapter's 239 ns working case and 1.59 µs failure.

Phoebe, the physics guidePhoebe guides
The one targetCalculate whether an I2C line rises fast enough.
The chapter case4.7 kΩ with 60 pF and 400 pF.
What it buys youChoose a pull-up from measured bus capacitance.

A field team faces an unresolved physical question: Why bus capacitance forces a smaller I2C pull-up They must answer it before changing i2c bus capacitance on the real device. Predict the direction first.

See the relationship before changing it

The figure reads from left to right. The blue card is i2c bus capacitance. The middle card applies this page's relationship. The green card is 30–70% rise time. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This added model holds every other chapter fixture fixed, so the numeric fixture does not switch without explanation.

I2C bus capacitance changes 30–70% rise time An input card leads through the page relationship to the 30–70% rise time result. SET INPUT ONE CONTROL APPLY RULE predict calculate check units READ RESULT
Walk the arrows. Every readout comes from the same 0.847RC rule; the resistance limit is that rule solved backwards.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline for i2c bus capacitance is 60.

  2. 2

    Name the relationship. τ=RC; tr=0.847RC; Rmax=tlimit/(0.847C)

  3. 3

    Substitute the chapter fixture. Set i2c bus capacitance to 60. The page ledger gives 30–70% rise time as 239 ns.

  4. 4

    Read the result. Keep ns beside the value. Use it only inside the technical boundary on this page.

Predict, then change i2c bus capacitance

Try Predict the direction of 30–70% rise time. Move one control, calculate, then check your prediction.

60
Chapter baseline
30–70% rise time

Observe Every readout comes from the same 0.847RC rule; the resistance limit is that rule solved backwards. Reset the control to 60 and compare 30–70% rise time.

Explain Only i2c bus capacitance moves here. The other chapter fixtures remain fixed.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only i2c bus capacitance moves. Field effects named in the page's technical boundary stay fixed.

Honesty note. This teaching model changes only i2c bus capacitance. It replays the chapter fixture; it is not a field prediction.

1. Start with the electrical story

An open-drain device can pull SDA or SCL low, but it cannot drive the line high. After release, the pull-up resistor supplies charge to every parasitic capacitance on the bus.

Phoebe: More capacitance means more charge must move. More resistance means less current moves it. Their product is the delay scale.

2. Build the RC response

V(t)=VDD[1−e^(−t/RC)] and τ=RC

The I2C rise interval is measured from 0.3VDD to 0.7VDD. Solving the charging curve at both thresholds and subtracting gives:

1

At 0.3VDDt30=−RC ln(0.7).

2

At 0.7VDDt70=−RC ln(0.3).

3

Subtracttr=t70−t30=RC ln(0.7/0.3)=0.847RC.

3. Check the units

One ohm times one farad is one second. With R in ohms and C in picofarads, RC in nanoseconds is R×C/1,000. The factor 0.847 has no unit.

4,700 Ω × 60 pF / 1,000 = 282 ns

4. Try the bus capacitance

τ=RC; tr=0.847RC; Rmax=tlimit/(0.847C)

TryMove capacitance from a short bus toward the chapter's 400 pF ceiling.

RC time constant
30–70% rise time
Fast-mode margin
Largest Fast-mode pull-up

ObserveAt 60 pF, τ is 282 ns and rise time rounds to 239 ns, leaving about 61 ns of Fast-mode margin.

ExplainEvery readout comes from the same 0.847RC rule; the resistance limit is that rule solved backwards.

Technical boundaries.

This lumped RC model assumes a short bus and a single effective capacitance.

measured rise time
Needs separate evidence
device sink-current limits
Needs separate evidence
voltage thresholds
Needs separate evidence
layout parasitics
Needs separate evidence
temperature/part spread
Needs separate evidence

Use field evidence or a deeper model before release.

5. Work the 400 pF failure

τ=4,700×400 pF=1.88 µs
tr=0.847×1.88 µs=1.59 µs

That exceeds the 1,000 ns Standard-mode limit as well as the 300 ns Fast-mode limit. The 400 pF specification is a ceiling, not a design target.

6. Solve Fast mode backwards

1

Start at the limit300 ns=0.847RC.

2

Make R the subjectR=300 ns/(0.847C).

3

Use 400 pFR=885 Ω, far below the beginner-friendly 4.7 kΩ.

7. Check yourself

Why does a larger capacitor slow the rising edge?
Answer: It needs more charge to reach the same voltage, so RC and the 30–70% rise interval both increase.
What is τ for 4.7 kΩ and 60 pF?
Answer: 4,700×60 pF=282 ns.
Why can 400 pF fail even at 100 kHz?
Answer: Its 1.59 µs rise exceeds Standard mode's 1.00 µs edge limit even though a 100 kHz period is 10 µs.
Honesty boundary.

These are the chapter inputs, worked results, and named teaching assumptions.

4.7 kΩ pull-up
Resistance or impedance value
60 pF realistic case
Capacitance value
400 pF ceiling
Capacitance value
282 ns time constant
Time, interval, or service-life value
239 ns rise
Time, interval, or service-life value
300 ns Fast-mode limit
Time, interval, or service-life value
1.88 µs time constant
Time, interval, or service-life value
1.59 µs rise
Time, interval, or service-life value
1,000 ns Standard-mode limit
Time, interval, or service-life value
885 Ω reverse solve come from the chapter
Resistance or impedance value

The page does not claim RC arithmetic replaces an oscilloscope check.

Return to the chapter with the maths unpacked →