Math Bridge: I2C Rise-Time Budget

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Math BridgeElectronicsStruggle-friendly runway

Why does 400 kHz I2C need a stronger pull-up?

Turn clock speed and capacitance into an edge-time and sink-current ledger.

Eddie, the electronics guideEddie guides
The one targetCalculate how an I2C rise budget limits pull-up resistance.
The chapter case100 and 400 kHz, illustrative 100 pF bus, 10% period budget, 3.3 V.
What it buys youA linked timing and sink-current check before choosing a resistor.

A field team faces an unresolved physical question: Why does 400 kHz I2C need a stronger pull-up? They must answer it before changing i2c clock on the real device. Predict the direction first.

See the relationship before changing it

The figure reads from left to right. The blue card is i2c clock. The middle card applies this page's relationship. The green card is clock period. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This added model holds every other chapter fixture fixed, so the numeric fixture does not switch without explanation.

I2C clock changes clock period An input card leads through the page relationship to the clock period result. SET INPUT ONE CONTROL APPLY RULE predict calculate check units READ RESULT
Walk the arrows. The pull-up cannot be selected from rise time alone: it must be low enough to charge C, yet high enough that every device can sink the resulting current.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline for i2c clock is 400.

  2. 2

    Name the relationship. T400k=1/400000=2.50 us tr,budget=0.10(2.50 us)=250 ns Rmax=250 ns/(0.847x100 pF)=2.95 kohm Isink=3.3/2952=1.12 mA T100k=10.0 us; Rmax=11.8 kohm

  3. 3

    Substitute the chapter fixture. Set i2c clock to 400. The page ledger gives clock period as 2.50 us.

  4. 4

    Read the result. Keep us beside the value. Use it only inside the technical boundary on this page.

Predict, then change i2c clock

Try Predict the direction of clock period. Move one control, calculate, then check your prediction.

400
Chapter baseline
Clock period

Observe The pull-up cannot be selected from rise time alone: it must be low enough to charge C, yet high enough that every device can sink the resulting current. Reset the control to 400 and compare clock period.

Explain Only i2c clock moves here. The other chapter fixtures remain fixed.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only i2c clock moves. Field effects named in the page's technical boundary stay fixed.

Honesty note. This teaching model changes only i2c clock. It replays the chapter fixture; it is not a field prediction.

1. Start with the physical story

An I2C device pulls a line LOW, but no device actively drives it HIGH. Releasing the line lets the pull-up resistor charge all bus capacitance. A faster clock leaves less time for that charge.

Eddie: Clock speed sets the deadline; R and C set how quickly the voltage rises toward it.

2. Name every algebra move

1

Invert clock frequencyT=1/f gives one period.

2

Reserve edge timeMultiply T by the stated 10% illustration.

3

Use threshold riseFor 30% to 70%, tr≈0.847RC.

4

Isolate the resistorR=tr/(0.847C).

5

Check LOW currentWhen asserted, I≈VDD/R.

3. Reproduce the chapter case

T400k=1/400000=2.50 µs
tr,budget=0.10(2.50 µs)=250 ns
Rmax=250 ns/(0.847×100 pF)=2.95 kΩ
Isink=3.3/2952=1.12 mA
T100k=10.0 µs; Rmax=11.8 kΩ

Quadrupling the clock divides the period, rise budget, and allowed resistance by four while multiplying the pull-up current by four.

4. Try one real input

TryMove clock speed and predict the largest pull-up allowed by the same illustrative budget.

I2C clock
Clock period
10% rise budget
Maximum pull-up
LOW sink current
RC time constant
Calculated rise
9600-baud 8N1 byte

ObserveMore clock speed shrinks allowable R and raises sink current. The UART byte time does not change because it belongs to a different push-pull timing contract.

ExplainThe pull-up cannot be selected from rise time alone: it must be low enough to charge C, yet high enough that every device can sink the resulting current.

Technical boundaries.

The 10% budget and 100 pF bus are explicit illustrations, not universal I2C limits.

Timing
Use the selected I2C mode's specified rise time and each device's timing limits.
Capacitance
Trace, cable, connector, probes, and every device pin contribute to the real C.
Current
VOL, sink rating, resistor tolerance, voltage, and leakage bound the strong-pull-up side.

Correct, not complete: this ledger does not certify 400 kHz operation or choose a production pull-up.

5. Use the result in the design

Measure total capacitance or the actual edge, apply the mode's rise-time limit, then check VOL and sink current across voltage and temperature.

6. Record the evidence state

Record clock mode, VDD, pull-up value and tolerance, device count, estimated and measured capacitance, measured rise time, VOL, sink current, harness, and probe loading.

7. Check yourself

Why does 400 kHz have one quarter of the 100 kHz period?
Answer: Period is the reciprocal of frequency, so multiplying frequency by four divides period by four.
Why can a pull-up be too strong?
Answer: A smaller resistance draws more current when a device holds the bus LOW and may violate its VOL or sink rating.
Does 2.95 kΩ prove this bus works?
Answer: No. The capacitance and 10% budget are illustrative, and device timing, current, tolerances, layout, and measurement still matter.
Honesty boundary.

The arithmetic reproduces the chapter's 100/400 kHz inverse scaling with an explicitly illustrative 100 pF, 10% edge budget.

Timing
Use the selected I2C mode's specified rise time and each device's timing limits.
Capacitance
Trace, cable, connector, probes, and every device pin contribute to the real C.
Current
VOL, sink rating, resistor tolerance, voltage, and leakage bound the strong-pull-up side.

Correct, not complete: this ledger does not certify 400 kHz operation or choose a production pull-up.

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