Math Bridge: BSS138 Bidirectional Level Shifting

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Math BridgeElectronicsStruggle-friendly runway

How does one MOSFET pull a bus low in both directions?

Track the standard BSS138 gate bias, body diode, channel resistance, and pull-ups.

Eddie, the electronics guideEddie guides
The one targetExplain and check the two LOW-transfer paths of one BSS138 shifter.
The chapter case3.3 V / 5 V, 4.7 kΩ per side, 0.65 V body diode, illustrative 50 Ω RDS(on).
What it buys youA bus LOW that is valid on both sides without exposing either side to the other rail.

A field team faces an unresolved physical question: How does one MOSFET pull a bus low in both directions? They must answer it before changing channel resistance on the real device. Predict the direction first.

See the relationship before changing it

The figure reads from left to right. The blue card is channel resistance. The middle card applies this page's relationship. The green card is gate-to-source drive. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This added model holds every other chapter fixture fixed, so the numeric fixture does not switch without explanation.

Channel resistance changes gate-to-source drive An input card leads through the page relationship to the gate-to-source drive result. SET INPUT ONE CONTROL APPLY RULE predict calculate check units READ RESULT
Walk the arrows. Static LOW margin can be generous while dynamic rise time still fails. Released lines rise through pull-ups and bus capacitance, so speed is a separate RC contract.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline for channel resistance is 50.

  2. 2

    Name the relationship. VGS=3.30-0=3.30 V Ihigh=5.00/4700=1.0638 mA Voffset=(50)(5.00/4700)=0.05319 V VIL,high=0.30(5.00)=1.50 V; offset share=3.55% Vdiode hand-off=3.30-0.65=2.65 V Ilow=3.30/4700=0.7021 mA

  3. 3

    Substitute the chapter fixture. Set channel resistance to 50. The page ledger gives gate-to-source drive as 3.30 V.

  4. 4

    Read the result. Keep V beside the value. Use it only inside the technical boundary on this page.

Predict, then change channel resistance

Try Predict the direction of gate-to-source drive. Move one control, calculate, then check your prediction.

50
Chapter baseline
Gate-to-source drive

Observe Static LOW margin can be generous while dynamic rise time still fails. Released lines rise through pull-ups and bus capacitance, so speed is a separate RC contract. Reset the control to 50 and compare gate-to-source drive.

Explain Only channel resistance moves here. The other chapter fixtures remain fixed.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only channel resistance moves. Field effects named in the page's technical boundary stay fixed.

Honesty note. This teaching model changes only channel resistance. It replays the chapter fixture; it is not a field prediction.

1. Start with the physical story

In the standard circuit, the MOSFET gate is tied to the lower 3.3 V rail and its source faces the 3.3 V bus. A low-side pull immediately creates gate-to-source drive. A high-side pull first forward-biases the body diode, which lowers the source until the channel turns on.

Eddie: The two directions share one final channel, but they do not share the same first step.

2. Name every algebra move

1

Set the gateTie gate to the lower 3.3 V supply.

2

Pull the source lowSubtract source voltage from gate voltage to get 3.30 V drive.

3

Find high-side currentDivide 5.00 V by the 4.70 kΩ pull-up.

4

Find channel offsetMultiply that current by RDS(on).

5

Check LOW marginCompare offset with 0.30×5.00 V.

6

Find diode hand-offSubtract the 0.65 V body-diode drop from the 3.30 V source level.

3. Reproduce the corrected chapter case

VGS=3.30−0=3.30 V
Ihigh=5.00/4700=1.0638 mA
Voffset=(50)(5.00/4700)=0.05319 V
VIL,high=0.30(5.00)=1.50 V; offset share=3.55%
Vdiode hand-off=3.30−0.65=2.65 V
Ilow=3.30/4700=0.7021 mA

The legacy box incorrectly tied the gate to 5 V and reported 5 V gate drive. The standard topology and the chapter's deeper text tie the gate to the lower rail, so the corrected drive is 3.3 V. The old 5.37% margin also compared the high-side offset with a 3.3 V threshold; its matching 5 V LOW threshold gives 3.55%.

4. Try one real input

TryMove channel resistance and predict the translated high-side LOW and its threshold share.

Channel resistance
Gate-to-source drive
High-side LOW offset
High-side LOW offset
High-side LOW threshold
Threshold used
Body-diode hand-off
Low-side pull-up current
High-side pull-up current

ObserveHigher channel resistance raises the translated LOW, while gate drive, diode hand-off, and pull-up currents remain fixed by rails and resistors.

ExplainStatic LOW margin can be generous while dynamic rise time still fails. Released lines rise through pull-ups and bus capacitance, so speed is a separate RC contract.

Technical boundaries.

This ledger uses a static RDS(on), fixed diode drop, symmetric 4.7 kΩ pull-ups, and 0.3VDD LOW thresholds.

MOSFET
Threshold voltage is not an on-resistance guarantee; RDS(on), diode drop, leakage, and capacitances vary with voltage, current, temperature, and part.
Bus
Capacitance, pull-up tolerance, device sink limits, rise-time specification, clock stretching, and topology set usable speed.
Power
Unpowered domains, clamps, sequencing, and back-power paths need separate checks or a translator with power-off isolation.

Correct, not complete: this static ledger does not validate I²C speed, hot-plug behavior, or a specific BSS138 part.

5. Use the result in the design

Check both static LOW levels, then measure rising edges with the final harness and devices. Use a dedicated translator when speed, voltage range, push-pull signals, power-off isolation, or sequencing exceeds the simple MOSFET circuit.

6. Record the evidence state

Keep rail voltages and sequence, MOSFET part and orientation, pull-ups and tolerance, bus capacitance, frequency, measured LOW and rise time at temperature, device sink limits, powered-off states, and pass margins.

7. Check yourself

Why is gate drive 3.3 V, not 5 V?
Answer: The standard BSS138 gate is tied to the lower 3.3 V rail; pulling its source to ground gives VGS=3.3 V.
What starts a high-side-to-low-side transfer?
Answer: The falling high-side drain forward-biases the body diode, pulling the low-side source down until the channel turns on.
Does a 53.2 mV static LOW prove 400 kHz I²C works?
Answer: No. Pull-up resistance, total capacitance, device limits, edge shape, and timing still decide bus speed.
Honesty boundary.

The arithmetic corrects the legacy gate-bias and threshold-reference errors while retaining the chapter's 3.3 V / 5 V / 4.7 kΩ case.

MOSFET
Threshold voltage is not an on-resistance guarantee; RDS(on), diode drop, leakage, and capacitances vary with voltage, current, temperature, and part.
Bus
Capacitance, pull-up tolerance, device sink limits, rise-time specification, clock stretching, and topology set usable speed.
Power
Unpowered domains, clamps, sequencing, and back-power paths need separate checks or a translator with power-off isolation.

Correct, not complete: this static ledger does not validate I²C speed, hot-plug behavior, or a specific BSS138 part.

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