See the relationship before changing it
The figure reads from left to right. The blue card is motor startup current. The middle card applies this page's rule. The green card is wiring voltage sag. Walk the arrows once: set the input, apply the rule, then read the result with its unit.
The retained audit below checks several chapter fixtures. This model keeps those stated values fixed and changes only motor startup current, so the numeric fixture does not switch without explanation.
Derive the baseline in four named moves
- 1
Name the input. The chapter baseline is 2 A.
- 2
Name the relationship. sag = startup current x 0.30 ohm
- 3
Substitute with units. 2.0 A x 0.30 ohm = 0.60 V
- 4
Read the result. Keep the unit beside the value. Use it only inside the technical boundary on this page.
Predict, then change motor startup current
Try Predict the direction of sag = startup current x 0.30 ohm. Test another motor startup current, then compare wiring voltage sag.
Observe A larger startup surge creates deeper sag in the same wiring resistance. Reset motor startup current to 2 and compare wiring voltage sag.
Explain A larger startup surge creates deeper sag in the same wiring resistance.
Check yourself
What should you do before trusting a moved-control result?
What does this small model leave out?
1. Start with the shared current
The motor-start current crosses the same wiring resistance before it reaches the load. Ohm's law says that resistance spends some supply voltage as heat.
2. Turn the sag into ADC codes
MultiplyVoltage lost is current times resistance: Vwire=IRwire.
Divide the ADC rangeAn N-bit converter has 2^N levels, so q=Vref/2^N.
Count stepsThe sag spans Vwire/q codes.
3. Add the separate clock question
A large number of ADC codes does not guarantee that a periodic sample lands inside a short pulse. The sample period must be shorter than the pulse.
4. Try the sample rate
TryMove the sample rate from a slow control loop through the strict 1 ms timing boundary.
ObserveAt 100 Hz the 0.6 V sag spans about 745 codes, yet samples are 10 ms apart. The amplitude is resolvable while the 1 ms event is not guaranteed to be observed.
ExplainADC bit depth answers “how small a voltage?” Sample rate answers “how brief an event?” Both conditions must pass.
The 1 ms pulse is the chapter's explicitly labelled typical assumption, not a measured motor guarantee.
- ADC settling
- Needs separate evidence
- trigger phase
- Needs separate evidence
- anti-alias filtering
- Needs separate evidence
- supply impedance
- Needs separate evidence
- inrush shape
- Needs separate evidence
- brownout dynamics
- Needs separate evidence
Use field evidence or a deeper model before release.
5. Reproduce the chapter values
2 A×0.3 Ω=0.6 V. A 12-bit, 3.3 V ADC has q=3.3/4096=0.000806 V=0.806 mV, so the sag spans about 745 codes. A 1 ms pulse sets the strict boundary fs>1,000 Hz; 100 Hz gives Ts=10 ms.
6. Prove the installed event
Measure the actual startup waveform, ADC aperture and phase, supply rail, driver current, sample timestamps, and brownout flag. Triggered capture may be more honest than blind periodic polling.
7. Check yourself
Why is 745 codes not enough proof?
Does exactly 1,000 Hz strictly guarantee a sample inside 1 ms?
Does this prove every startup pulse lasts 1 ms?
These are the chapter inputs, worked results, and named teaching assumptions.
- 2 A
- Current or responsivity value
- 0.3 Ω
- Resistance or impedance value
- 0.6 V
- Voltage or voltage-step value
- 12-bit
- Digital resolution or converter setting
- 3.3 V
- Voltage or voltage-step value
- 0.806 mV
- Voltage or voltage-step value
- about 745 codes
- Sensor scale, pressure, or digital result
- 1 ms
- Time, interval, or service-life value
- 1 kHz
- Frequency, sample rate, or event rate
- 100 Hz
- Frequency, sample rate, or event rate
- 10 ms
- Time, interval, or service-life value
Only the first six are chapter-specific measurements or design values; the pulse duration and sample rates are explicitly bounded examples.
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