Race-to-Sleep Only Wins Inside the Voltage Band

Race-to-Sleep Only Wins Inside the Voltage Band

Ada re-derives this chapter’s own numbers step by step, at full precision

foundations
math-foundations
calculation-audit
energy-power
Ada ADA · CALCULATION AUDIT

Race-to-Sleep Only Wins Inside the Voltage Band

Running a fixed 8-million-cycle task faster draws more current but finishes sooner, so at constant voltage clocking up from 16 to 48 MHz cuts energy by about 30% — the fixed 2 mA awake overhead is simply paid for less time. But reaching the top clock can force the core voltage from 1.0 up to 1.3 V, and dynamic energy scales with voltage squared. This audit rebuilds both ledgers to find where race-to-sleep stops paying: does the faster clock still win once that voltage step is counted?

Companion to the chapter Measure-First Optimization — every number here comes from that chapter.

See the relationship before changing it

The figure reads from left to right. The blue card is core clock. The middle card applies this page's rule. The green card is constant-voltage charge. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This model keeps those stated values fixed and changes only core clock, so the numeric fixture does not switch without explanation.

Core clock changes constant-voltage charge An input card leads through the rule charge = 1.2 mA-s dynamic + 16 / clock MHz to the constant-voltage charge result. INPUT PAGE INPUT APPLY THE RULE predict calculate check units OUTPUT RESULT
Walk the arrows. At fixed voltage the dynamic charge stays fixed while the awake overhead falls as clock speed rises.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline is 48 MHz.

  2. 2

    Name the relationship. charge = 1.2 mA-s dynamic + 16 / clock MHz

  3. 3

    Substitute with units. 1.2 + 16 / 48 = 1.533 mA-s

  4. 4

    Read the result. Keep the unit beside the value. Use it only inside the technical boundary on this page.

Predict, then change core clock

Try Predict the direction of charge = 1.2 mA-s dynamic + 16 / clock MHz. Test another core clock, then compare constant-voltage charge.

48 MHz
Chapter baseline
Constant-voltage charge

Observe At fixed voltage the dynamic charge stays fixed while the awake overhead falls as clock speed rises. Reset core clock to 48 and compare constant-voltage charge.

Explain At fixed voltage the dynamic charge stays fixed while the awake overhead falls as clock speed rises.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only core clock moves here. Field effects named in the technical boundary stay fixed.
TryRecompute At 16 MHz: run time 8e6 / 16e6 = 0.500 s; current 0.15 x 16 + 2 = 4.4 mA; energy 4.4 x 0.500 = 2.20 mA-s.
ObserveTrack At 48 MHz: run time 8e6 / 48e6 = 0.16667 s; current 0.15 x 48 + 2 = 9.2 mA; energy 9.2 x 0.16667 = 1.5333 mA-s.
ExplainExplain why raising voltage from 1.0 V to 1.3 V multiplies dynamic energy by 1.69 and can erase the shorter 48 MHz run-time gain.

Ready: use the stated baseline inputs, then compare each displayed result.

Ada: The chapter makes two numeric claims that pull in opposite directions — that racing an 8-Mcycle task from 16 to 48 MHz saves about 30% energy, and that raising the core voltage to reach the higher clock can erase that saving. Both hinge on splitting the energy into a dynamic part and a fixed-overhead part, so let me rebuild them from the chapter’s own model (k = 0.15 mA/MHz, 2 mA awake overhead, 8,000,000 cycles).

  • At 16 MHz: run time 8e6 / 16e6 = 0.500 s; current 0.15 x 16 + 2 = 4.4 mA; energy 4.4 x 0.500 = 2.20 mA-s.
  • At 48 MHz: run time 8e6 / 48e6 = 0.16667 s; current 0.15 x 48 + 2 = 9.2 mA; energy 9.2 x 0.16667 = 1.5333 mA-s.
  • Saving: (2.20 - 1.5333) / 2.20 = 30.3% — because the dynamic charge is 1.2 mA-s at either clock (frequency cancels), while the fixed 2 mA overhead falls from 2 x 0.500 = 1.00 mA-s to 2 x 0.16667 = 0.333 mA-s.
  • Now raise the core from 1.0 V to 1.3 V to reach 48 MHz. Dynamic energy scales with voltage squared: 1.3^2 = 1.69, so 1.2 x 1.69 = 2.028 mA-s. Add the shorter-run fixed overhead: 2.028 + 0.333 = 2.36 mA-s.

The audit confirms the reversal exactly: at constant voltage the fast clock wins by 30% (1.53 versus 2.20 mA-s), but the 30% voltage step pushes it to 2.36 mA-s — now worse than the 2.20 mA-s slow baseline. That is why the energy-optimal clock is usually a middle value: race to the top of the constant-voltage band, then stop, because the square-law voltage penalty overtakes the linear time saving the moment more speed starts costing volts.

Every number above is taken from the chapter’s own material and re-derived step by step.

Technical boundaries. This race-to-sleep model deliberately does not simulate cache stalls, regulator losses, thermal throttling, or workload variation. It uses the stated cycle count, frequency-dependent current, and 1.0 V versus 1.3 V dynamic-energy scaling.