Two Memory Budgets That Must Both Close

Two Memory Budgets That Must Both Close

Ada re-derives this chapter’s own numbers step by step, at full precision

ADA · CALCULATION AUDIT

Two Memory Budgets That Must Both Close

The chapter runs a microcontroller budget of 256 KB flash and 64 KB SRAM, packing 60,000 INT8 weights and other segments into 238 KB of flash, 18 KB to spare, and 38 KB of SRAM. A wrong sum here is a device that silently fails to boot. This audit adds every line itself, because flash and SRAM are two memory budgets that must both close independently.

Companion to the chapter TinyML on Microcontrollers — every number here comes from that chapter.

See the relationship before changing it

The figure reads from left to right. The blue card is weight storage. The middle card applies the page rule. The green card is flash headroom. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

Walk the arrows. Flash headroom and SRAM headroom are separate gates. Passing one does not pass the other.

Derive the baseline in four named moves

1. 1

   Name the input. The chapter baseline is 60 KB.

2. 2

   Name the relationship. headroom = 256 - (weights + 92 + 74 + 12) KB

3. 3

   Substitute with units. 256 - (60 + 92 + 74 + 12) = 18.00 KB

4. 4

   Read the result. Keep the unit beside the value. Use it only inside the technical boundary on this page.

Predict, then change weight storage

Try Predict the direction of headroom = 256 - (weights + 92 + 74 + 12) KB. Test another weight storage, then compare flash headroom.

Weight storage

60 KB

Chapter baseline

Flash headroom

Observe Flash headroom and SRAM headroom are separate gates. Passing one does not pass the other. Reset weight storage to 60 and compare flash headroom.

Explain Flash headroom and SRAM headroom are separate gates. Passing one does not pass the other.

Check yourself

What should you do before trusting a moved-control result?

Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.

What does this small model leave out?

Answer: Only weight storage moves here. Field effects named in the technical boundary stay fixed.

Honesty note. This teaching model changes only weight storage. It is not a field prediction.

TryThe chapter runs a microcontroller budget of 256 KB flash and 64 KB SRAM, packing 60,000 INT8 weights and other segments into 238 KB of flash, 18 KB to spare, and 38 KB of SRAM. Use Check derivation.

ObserveThe displayed ledger resolves 256 KB, 64 KB, 60,000, 238 KB, 18 KB at full precision. This audit adds every line itself, because flash and SRAM are two memory budgets that must both close independently. Check derivation shows this.

ExplainFlash and SRAM are independent gates: quantising weights shrinks the 238 KB program image but does not shrink the 38 KB tensor arena, so both headroom figures must remain positive after every shape or buffer change. Check derivation confirms it.

Ada: This chapter runs a 256 KB-flash, 64 KB-SRAM board budget and a separate gesture-classifier SRAM budget, then insists both keep headroom. Because a wrong sum here is a device that silently fails to boot, let me add every line myself.

• Weight footprint. An INT8 weight is one byte, so 60,000 weights = 60,000 bytes, which the chapter rounds to 60 KB (or 60,000 / 1024 = 58.59 KB if a KB is 1024 bytes). The same rule gives the later 80,000 weights = 80 KB.
• Flash gate. 60 + 92 + 74 + 12 = 238 KB used; headroom 256 - 238 = 18 KB.
• SRAM gate. 18 + 8 + 12 = 38 KB used; headroom 64 - 38 = 26 KB.
• Gesture example. Its SRAM adds 58 + 16 + 52 = 126 KB, which fits a 256 KB device with 256 - 126 = 130 KB left before logging, radio buffers, and safety headroom are counted.

Both budgets close, but flash and SRAM are independent release gates. Quantizing or pruning shrinks the 238 KB flash side while leaving the 38 KB tensor-arena side untouched, and doubling the feature buffer changes SRAM even though the model file never moves — so any buffer or input-shape change forces a fresh fit check, not a re-use of this one.

Technical boundaries
The memory sums deliberately do not simulate stack peaks, allocator fragmentation, DMA buffers, operator scratch space, OTA slots, or runtime overlap between tensors; they test the named static flash and SRAM allocations only.

Work the audit first, then check the displayed derivation.

Every number above is taken from the chapter’s own material and re-derived step by step.