Ada Audits ADC Architecture Numbers

Ada re-derives this chapter’s own numbers step by step, at full precision

ADA · CALCULATION AUDIT

Ada Audits ADC Architecture Numbers

A 12-bit SAR ADC on a 3.3 V reference resolves one code at 0.806 mV and needs about 9 time constants to settle, while summing 16 samples buys roughly two more bits and a first-order sigma-delta at OSR 64 shapes noise into about 8.97 effective bits. Each architecture spends samples, settling time, or bandwidth to gain resolution. This audit re-derives volts-per-code, settling, oversampling throughput, and noise-shaped bits, and asks what each extra bit really costs before a headline resolution is trusted.

Companion to the chapter ADC Architecture and Resolution — every number here comes from that chapter.

Ada: Architecture claims are only useful when the arithmetic exposes what each ADC spends: volts per code, settling time, samples, throughput, and in-band noise.

LSB = Vref / 2^N = 3.3 V / 4096 = 0.0008057 V = 0.806 mV

Claim	Audit arithmetic	Design reading
Half-scale 12-bit SAR code	round(1.65 / 3.3 * 4095) = round(2047.5) = 2048	The code is plausible for a mid-scale 0-3.3 V pressure signal.
Three-code jitter size	3 * 0.806 mV = 2.42 mV	That wobble is small for a switch threshold, but too large for a millivolt bridge unless the front end adds gain or filtering.
12-bit SAR settling target	(12 + 1) * ln(2) = 13 * 0.693 = 9.01 time constants	A weak source must either settle for about 9 tau, use a buffer, or accept biased codes.
Two extra oversampled bits	4^2 = 16 samples; 16 * 4095 = 65520; throughput becomes 1/16	The extra resolution is not free, and it still needs roughly one LSB of dither.
First-order sigma-delta OSR 64	64 = 2^6, so 6 octaves * 9 dB = 54 dB; 54 / 6.02 = 8.97 bits	Noise shaping explains the extra effective bits, before real reference, clock, and analog noise limits are counted.

Every number above is taken from the chapter’s own material and re-derived step by step.