ADC Architecture Calculation Audit

ADC Architecture Calculation Audit

Ada re-derives this chapter’s own numbers step by step, at full precision

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Ada ADA · CALCULATION AUDIT

ADC Architecture Calculation Audit

A 12-bit SAR ADC on a 3.3 V reference resolves one code at 0.806 mV and needs about 9 time constants to settle, while summing 16 samples buys roughly two more bits and a first-order sigma-delta at OSR 64 shapes noise into about 8.97 effective bits. Each architecture spends samples, settling time, or bandwidth to gain resolution. This audit re-derives volts-per-code, settling, oversampling throughput, and noise-shaped bits, and asks what each extra bit really costs before a headline resolution is trusted.

Companion to the chapter ADC Architecture and Resolution — every number here comes from that chapter.

Ada: Architecture claims are only useful when the arithmetic exposes what each ADC spends: volts per code, settling time, samples, throughput, and in-band noise.

See the relationship before changing it

The figure reads from left to right. The blue card is adc resolution. The middle card applies this page's rule. The green card is code width. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This model keeps those stated values fixed and changes only adc resolution, so the numeric fixture does not switch without explanation.

ADC resolution changes code width An input card leads through the rule LSB = 3,300 mV / 2^bits to the code width result. INPUT PAGE INPUT APPLY THE RULE predict calculate check units OUTPUT RESULT
Walk the arrows. Each added bit halves ideal code width before noise and settling limits are counted.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline is 12 bits.

  2. 2

    Name the relationship. LSB = 3,300 mV / 2^bits

  3. 3

    Substitute with units. 3,300 / 2^12 = 0.806 mV

  4. 4

    Read the result. Keep the unit beside the value. Use it only inside the technical boundary on this page.

Predict, then change adc resolution

Try Predict the direction of LSB = 3,300 mV / 2^bits. Test another adc resolution, then compare code width.

12 bits
Chapter baseline
Code width

Observe Each added bit halves ideal code width before noise and settling limits are counted. Reset adc resolution to 12 and compare code width.

Explain Each added bit halves ideal code width before noise and settling limits are counted.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only adc resolution moves here. Field effects named in the technical boundary stay fixed.

Honesty note. This teaching model changes only adc resolution. It is not a field prediction.

Try

Treat the 12-bit SAR at 3.3 V, 16-sample oversampling, and first-order sigma-delta at OSR 64 as fixed audit inputs; press Calculate to follow the ledger.

Observe

The rows show 0.806 mV per code, about 9 settling constants, 1/16 throughput, and roughly 8.97 shaped-noise bits.

Explain

Each architecture purchases resolution differently: SAR needs settling, averaging spends samples and throughput, and sigma-delta moves quantization noise out of band.

Technical boundaries

For the architecture ledger, excluded from this fixed arithmetic are reference drift, input-source settling error, aperture jitter, non-linearity, temperature drift, or analogue front-end noise beyond the stated terms.

LSB = Vref / 2^N = 3.3 V / 4096 = 0.0008057 V = 0.806 mV
Claim Audit arithmetic Design reading
Half-scale 12-bit SAR code round(1.65 / 3.3 * 4095) = round(2047.5) = 2048 The code is plausible for a mid-scale 0-3.3 V pressure signal.
Three-code jitter size 3 * 0.806 mV = 2.42 mV That wobble is small for a switch threshold, but too large for a millivolt bridge unless the front end adds gain or filtering.
12-bit SAR settling target (12 + 1) * ln(2) = 13 * 0.693 = 9.01 time constants A weak source must either settle for about 9 tau, use a buffer, or accept biased codes.
Two extra oversampled bits 4^2 = 16 samples; 16 * 4095 = 65520; throughput becomes 1/16 The extra resolution is not free, and it still needs roughly one LSB of dither.
First-order sigma-delta OSR 64 64 = 2^6, so 6 octaves * 9 dB = 54 dB; 54 / 6.02 = 8.97 bits Noise shaping explains the extra effective bits, before real reference, clock, and analog noise limits are counted.

Every number above is taken from the chapter’s own material and re-derived step by step.