ADC Sampling and Quantization
Watch a sensor voltage become timed samples, held values, quantized ADC codes, and a staircase digital signal.
ADC Sampling and Quantization
Step through a sensor voltage as it is sampled in time, held long enough for conversion, rounded to the nearest ADC level, and emitted as a digital code.
Goal
Separate time sampling from voltage quantization and see how each can fail.
Try First
Press Step across the pipeline and watch the sample dot, held value, code, and error update.
Watch
Low sample rate causes aliasing; low bit depth causes visible staircase error.
Why It Matters
IoT firmware can only trust ADC numbers when sampling rate, reference, and noise are sensible.
ADC Pipeline View
The analog curve, sample dots, held value, quantized staircase, code register, and error line stay synchronized with the selected stage.
Conversion Evidence
The selected stage explains what changes between the real voltage and the emitted digital code.
Sampling Check
Nyquist compares sample rate with signal frequency.
SafeQuantization Check
Bit depth and reference voltage decide how large each ADC step is.
16 levelsSensor Fit
Compares quantization step, noise, and useful signal span.
Teaching fitBeginner Ramp
Sampling answers when to measure. Quantization answers which numbered voltage step the measurement lands on. A good ADC design needs both a high-enough sample rate and small-enough voltage steps.
Pipeline Sequence
- Sensor outputs a continuous voltage.
- Sample clock chooses a moment in time.
- Sample-and-hold keeps that voltage steady during conversion.
- ADC maps the held voltage to a code.
- Firmware receives the integer code and converts it back to engineering units.
Nyquist Rule
For a simple signal, sample at least twice the highest frequency component. Real systems add margin and use an analog anti-alias filter because sensors and noise rarely contain only one perfect frequency.
Formula Reference
- Levels = 2^N for an N-bit ADC.
- Teaching LSB = Vref / 2^N.
- Code = round(Vin / LSB), clamped to 0 through 2^N - 1.
- Ideal quantization error is usually within +/- 0.5 LSB, except near rails.
Noise vs Resolution
More bits create smaller steps, but noisy sensors and unstable references can still make readings jump. If noise is larger than the LSB, averaging or filtering may matter more than buying a higher-bit ADC.
Practical IoT Note
Microcontrollers often expose 10-bit or 12-bit ADCs, but effective accuracy can be lower. Match the reference range to the sensor output, keep wiring quiet, and avoid sampling faster than the signal chain can settle.
Practice 1
Use Slow Potentiometer. Step through the pipeline and identify where the analog value becomes an integer code.
Practice 2
Switch to Aliasing Demo. Lower sample rate below twice the signal frequency. What warning appears and why?
Practice 3
Increase resolution from 4 bit to 10 bit. What happens to LSB size and quantization error?