Core Networking · Study deck

I2C: Transactions and Bus Design

This first route builds I2C from electrical signaling through addressed transactions and bus constraints.

Packet Pete is your guide for this deck.

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After studying this chapter

Learning objectives

You will be able to:

Explain I2C Architecture: Describe the two-wire bus structure with SDA and SCL, and justify why open-drain outputs require pull-up resistors
Calculate Pull-Up Resistor Values: Apply the RC rise-time formula to select appropriate resistor values for a given bus capacitance and speed mode
Distinguish I2C Addressing: Identify how 7-bit addresses map to write and read bytes, and select device addresses to avoid bus conflicts
Implement I2C Transactions: Explain the read and write transaction sequences (START, address frame, ACK, data, STOP) and translate them into test steps

Major section

Start With Many Chips Sharing Two Wires

I2C is useful because one controller can talk to many nearby devices using only SDA and SCL.

A microcontroller means a small computer on one chip that starts transfers and controls the device.
This proves one local bus setup, not every board layout; the deeper sections explain transfers, electrical limits, timing, arbitration, and recovery.
The shared bus works only when addresses, pull-ups, capacitance, timing, and acknowledgements all stay inside the design limits.

A GY-521 breakout carrying the MPU6050 -- the board this checklist wires up. The scanner step above is checking for exactly this chip's I2C address, 0x68 by default or 0x69 with AD0 pulled high. Photo: Nevit Dilmen, CC BY-SA 3.0

Major section

In 60 Seconds

I2C (Inter-Integrated Circuit) is a two-signal-wire synchronous bus using SDA (data) and SCL (clock) with pull-ups.

Seven-bit addressing provides 112 non-reserved address values out of 128; the practical device count is lower and depends on address conflicts and electrical loading.
Standard-mode reaches 100 kHz, Fast-mode 400 kHz, Fast-mode Plus 1 MHz, and High-speed mode 3.4 MHz when all devices support the chosen mode.
I2C often connects nearby sensors and displays with few controller pins.

Major section

I2C Wiring, Addressing, and Pull-Up Resistors

"I love I2C!" said Temperature Terry. "I need just two signal wires -- SDA for data and SCL for the clock -- plus power and ground.

Up to 112 of us can share those wires (fewer in practice)!".
the microcontroller explained how it works. "I am the master.
When I want Sammy's temperature reading, I send his address -- say 0x48 -- on the bus.

Major section

I2C Wiring, Addressing, and Pull-Up Resistors (continued)

"The pull-up resistors are super important though," warned the LED. "The wires need them to work properly.

And sometimes two sensors accidentally have the SAME address -- then you get conflicts.".
"I2C is not the fastest," admitted the battery, "only 100 to 400 kHz for most IoT work.
But it is incredibly simple -- just two wires for dozens of sensors!

Physical I2C wiring: two lines (SDA and SCL) run across all devices on the bus. Pull-up resistors hold both lines HIGH by default; any device can pull a line LOW using its open-drain output.

Major section

I2C Signals

The controller on the left drives SDA and SCL, and both lines run on to two sensors, one at address 0x48 and one at 0x76.

Each line has its own pull-up to Vcc, drawn between the controller and the sensors rather than at any single device.
The resistors belong to the bus, not to a board, so adding a third sensor adds no more of them.
Slaves can hold it LOW ("clock stretching") to slow master.

Major section

I2C Communication Protocol

SDA falls while SCL is still high, which is never allowed during data.

Between those edges SDA may change, and during them it may not.
The worked byte is 0xEC, the write address for the sensor.
On the ninth clock the receiver pulls SDA low to acknowledge, and a high there would mean no device answered.

I2C timing traces START, eight MSB-first address bits, ACK and STOP for a BME280 write. Sample SDA on SCL rising edges; START and STOP change SDA while SCL stays high. — I2C protocol timing: START and STOP conditions frame each transaction, with data sampled on SCL rising edge. The acknowledgment bit after each byte confirms successful reception.

Major section

I2C Write Transaction

A write is a fixed sequence, and each block in it must be acknowledged before the next is allowed. Figure: I2C Write Transaction Sequence puts that sequence in order.

This order explains most bring-up failures.
Master sends slave address + write bit (0).
Master sends register address.
Master sends data byte.

Major section

I2C Read Transaction

At that point the controller has said what to read but has not read anything.

Instead of stopping, it issues a repeated START, which keeps the bus and stops another controller taking over between the two halves.
Master sends REPEATED START (restart without releasing bus).
Master sends slave address + read bit (1).

I2C Read Transaction with Restart Condition

Major section

I2C Read Transaction (continued)

The controller ends with a NACK and then STOP, which tells the device not to send more. Figure: I2C Read Transaction with Restart Condition is one transaction, not two, and that is what protects the register selection.

Slave sends data byte(s); master ACKs each except the last.
Master sends NACK on final byte (signals end of read).
The Repeated START (step 6) is essential: it lets the master switch from write mode (selecting the register) to read mode (receiving data) without another device claiming the bus in between.

I2C communication protocol timing showing complete transaction

Major section

Optional MPU6050 Build Checklist

The photo cannot prove the installed wiring or the scanner result; the checklist below supplies those tests.

Four pins further down are the ones beginners mis-wire.
XDA and XCL are a second bus for an extra sensor, not spares for the first.
AD0 is the address select: leave it alone and the chip answers at 0x68, pull it high and it answers at 0x69, which is exactly the difference the scanner reports.

Real photograph of mpu6050 6-axis imu (accelerometer + gyroscope)

Major section

Putting Numbers to It

For I2C Fast-mode (400 kHz), the specified rise time from 30% to 70% of V~CC~ must be no more than 300 ns.

The I2C spec also requires minimum current drive capability of 3 mA at 0.4 V LOW level for Standard/Fast-mode (UM10204 Table 10).
This gives a range of 967 Ω to 7,080 Ω for this 50 pF bus.
The standard 4.7 kΩ falls well within this range, which is why it works for most short buses.
With 100 pF bus capacitance, the maximum drops to about 3.54 kΩ, so use 2.2–3.3 kΩ.

Major section

Hands-On Lab: BME280 Temperature Sensor

The lab reads one sensor over two wires, but the board offers more than two. Figure: A BME280 breakout board like the one this shows which edge belongs to this lab.

One carries just four pads: ground, 3.3 volts, and the SDA and SCL pair this lab uses.
Choosing an edge is therefore choosing a protocol.
The board ships without headers, so soldering is a step the parts list has to include before any scan can succeed.

A BME280 breakout board like the one this lab targets. The exposed metal-capped sensor is what the scanner below detects at 0x76 or 0x77, and the same board handles the temperature, humidity, and pressure reads this lab walks through. Photo: SparkFun Electronics, CC BY 2.0

Try it: Hands-On Lab: BME280 Temperature Sensor in the chapter

Deck summary

Key takeaways

I2C is useful because one controller can talk to many nearby devices using only SDA and SCL.

I2C (Inter-Integrated Circuit) is a two-signal-wire synchronous bus using SDA (data) and SCL (clock) with pull-ups.
"I love I2C!" said Temperature Terry. "I need just two signal wires -- SDA for data and SCL for the clock -- plus power and ground.
"The pull-up resistors are super important though," warned the LED. "The wires need them to work properly.
SDA falls while SCL is still high, which is never allowed during data.

Retrieval practice

Recall check 1 of 3

Packet Pete says: answer from memory, then check your reasoning.

Q1Why does a shared I2C bus need pull-up resistors on SDA and SCL?

ABecause pull-ups replace I2C addresses on shared SDA and SCL lines for each sensor.

BBecause pull-ups give each I2C sensor a separate physical data wire.

CBecause pull-ups turn the wired I2C bus into a wireless link.

DBecause open-drain devices pull low but resistors return shared lines high.

Show answer

Answer: D Open-drain signaling cannot drive the shared lines high.

Retrieval practice

Recall check 2 of 3

Packet Pete says: answer from memory, then check your reasoning.

Q2Two sensors work separately but fail when connected together with the same I2C address; what should be checked first?

AA cloud retention setting for readings from those two sensors

BA radio antenna orientation problem on the wired I2C bus

CAn address conflict between responders on the shared I2C bus

DAn ADC resolution limit that confuses the two device addresses

Show answer

Answer: C Two responders with one address can disrupt transactions.

Retrieval practice

Recall check 3 of 3

Packet Pete says: answer from memory, then check your reasoning.

Q3A BME280 sensor is configured with its SDO pin tied to GND, giving it address 0x76. You want to read a register from it. What is the first byte transmitted on the SDA line after the START condition?

A0x76, sending the seven-bit address with no read/write bit.

B0xED, shifting 0x76 left and appending the read bit 1.

C0x00, using a general call before addressing this sensor.

D0xEC, shifting 0x76 left and appending the write bit 0.

Show answer

Answer: D This BME280 register-read transaction starts with a 7-bit address plus write bit: 0x76 << 1 = 0xEC.

Print reference

Answers

Answer key.

D · Open-drain signaling cannot drive the shared lines high.
C · Two responders with one address can disrupt transactions.
D · This BME280 register-read transaction starts with a 7-bit address plus write bit: 0x76 << 1 = 0xEC.