Energy & Power · Study deck

Fixed-Point Arithmetic

Picture a battery sensor that stays awake to calculate a value its small processor could handle with scaled integers.

Battery Bruno is your guide for this deck.

optimizationfixedpoint
Battery Bruno, the module guide, in a scene from this chapter.
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After studying this chapter

Learning objectives

You will be able to:

  • Explain: That contrast is the visual's teaching load: Fixed-point conversion workflow from range survey and error budget through Q-format choice, safe implementation, boundary tests, and energy remeasurement.
  • Explain: In other words, no-panel fixed-point validation gates: range survey, golden vectors, overflow tests, error budget, target timing, and full-cycle energy evidence.
  • Explain: The separate 2^n-2 label adds a distinct review condition, preventing the first two stages from being accepted on their own.
  • Explain: Duty cycle means the share of time a device spends active instead of asleep.
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Major section

Start With a Floating-Point Cost You Can Avoid

A faster result is useful only if its error remains safe.

  • Firmware means the software stored on the device.
  • Duty cycle means the share of time a device spends active instead of asleep.
  • This runway does not prove that fixed-point arithmetic is always better.

Why it matters

Fixed-point work may reduce that active share.

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Major section

Q-Format Model

In a signed Qn.m format, n bits hold the signed integer side and m bits hold the fractional side.

  • The separate 2^n-2 label adds a distinct review condition, preventing the first two stages from being accepted on their own.
  • This distinction carries forward into q-format model.
Q-format fixed-point representation showing sign/integer bits, fractional bits, scale factor, resolution, and stored integer.
Q-format fixed-point representation showing sign/integer bits, fractional bits, scale factor, resolution, and stored integer.
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Major section

Validation Gates

Fixed-point arithmetic changes numerical behavior.

  • In other words, no-panel fixed-point validation gates: range survey, golden vectors, overflow tests, error budget, target timing, and full-cycle energy evidence.
  • Any required value cannot be represented with margin.
  • Error changes decisions, alarms, control output, or classification.
  • Intermediate values cannot wrap silently.
Fixed-point validation gates showing range survey, golden vectors, overflow tests, error budget, target timing, and full-cycle energy evidence.
Fixed-point validation gates showing range survey, golden vectors, overflow tests, error budget, target timing, and full-cycle energy evidence.
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Major section

Cycles Become Active Time Becomes Energy

They expose the two conditions that the surrounding argument must keep together.

  • That contrast is the visual's teaching load: Fixed-point conversion workflow from range survey and error budget through Q-format choice, safe implementation, boundary tests, and energy remeasurement.
Fixed-point conversion is not just a code rewrite; it starts with range and error evidence, then ends with boundary tests and a new energy measurement.
Fixed-point conversion is not just a code rewrite; it starts with range and error evidence, then ends with boundary tests and a new energy measurement.
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Deck summary

Key takeaways

A faster result is useful only if its error remains safe.

  • In a signed Qn.m format, n bits hold the signed integer side and m bits hold the fractional side.
  • Fixed-point arithmetic changes numerical behavior.
  • They expose the two conditions that the surrounding argument must keep together.
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Retrieval practice

Recall check 1 of 5

Battery Bruno says: answer from memory, then check your reasoning.

Q1What should drive the choice of integer and fractional bits in a fixed-point format?

AAlways choose the format with the most fractional bits.
BAlways use the same format for every value in the program.
CChoose the format only from the processor clock speed.
DMeasured value range, required precision, intermediate width.
Show answer

Answer: D Fixed-point design starts with numeric requirements and validation evidence.

Q2Why does fixed-point multiplication usually need a wider temporary value?

AThe product has more integer and fractional bits than either input.
BBecause addition and multiplication use the same intermediate width.
CBecause fixed-point values cannot be negative.
DTo add fractional precision to the input values before multiplying.
Show answer

Answer: A Fixed-point multiplication needs planned intermediate width and rescaling.

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Retrieval practice

Recall check 2 of 5

Battery Bruno says: answer from memory, then check your reasoning.

Q3Place each fixed-point design step where it lives so you can prevent overflow and quantify precision before firmware release.

ARange survey
BQ-format
COperation
DValidation
Show answer

Answer: A Connect measured bounds to bit allocation, arithmetic rules, and release evidence so you can show that the optimization saves resources without silently corrupting values.

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Retrieval practice

Recall check 3 of 5

Battery Bruno says: answer from memory, then check your reasoning.

Q4Why does a floating-point multiply cost far more energy than a fixed-point multiply on a Cortex-M0+ sensor node?

AThe FPU is present but clock-gated until the first multiply finishes.
BFloating-point storage bits leak more battery than integer storage bits.
CSoft-float uses many active cycles; fixed-point uses integer hardware.
DFixed-point needs a radio wakeup before each integer multiply.
Show answer

Answer: C Without an FPU, floats are emulated in software and take many cycles; fixed-point uses the integer multiplier in a few cycles.

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Retrieval practice

Recall check 4 of 5

Battery Bruno says: answer from memory, then check your reasoning.

Q5On a 16 MHz FPU-less core, a filter needs 50000 cycles per sample in software float and 3000 cycles in fixed-point, running at 100 samples per second. What is the main energy consequence?

ABoth use the same energy because the clock speed is the same.
BFloat holds the core active about 31% of each second versus under 2% for fixed-point.
CFixed-point uses more energy because integer math is less efficient.
DEnergy is unaffected; only accuracy changes between the two.
Show answer

Answer: B 100 x 3.125 ms = 312.5 ms/s active for float versus 18.75 ms/s for fixed. The float version cannot get back to sleep quickly, so its average current is far higher.

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Retrieval practice

Recall check 5 of 5

Battery Bruno says: answer from memory, then check your reasoning.

Q6A Cortex-M4F design with a single-precision FPU still shows high compute energy in a hot loop that uses floats. What is a likely cause?

AThe FPU makes single-precision float slower than software integer math.
BFixed-point has replaced float in the hot loop and is raising current.
CThe processor clock is too low, so every float becomes double.
DAccidental double math is falling back to software emulation.
Show answer

Answer: D The M4F FPU accelerates only single precision.

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Print reference

Answers 1 of 2

Answer key.

  1. D · Fixed-point design starts with numeric requirements and validation evidence.
  2. A · Fixed-point multiplication needs planned intermediate width and rescaling.
  3. A · Connect measured bounds to bit allocation, arithmetic rules, and release evidence so you can show that the optimization saves resources without silently corrupting values.
  4. C · Without an FPU, floats are emulated in software and take many cycles; fixed-point uses the integer multiplier in a few cycles.
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Print reference

Answers 2 of 2

Answer key.

  1. B · 100 x 3.125 ms = 312.5 ms/s active for float versus 18.75 ms/s for fixed. The float version cannot get back to sleep quickly, so its average current is far higher.
  2. D · The M4F FPU accelerates only single precision.
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