Energy & Power · Study deck

Low-Power Design: Sleep-State Energy Accounting

Firmware is the code stored on a device.

Battery Bruno is your guide for this deck.

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Battery Bruno, the module guide, in a scene from this chapter.

After studying this chapter

Learning objectives

You will be able to:

Explain: The review must show active duration from a trace, conversion energy at the actual voltage and resolution, reference settling, temperature leakage, and the measurement instrument's own floor.
Explain: A UART typically needs a clock high enough to generate and oversample the requested baud with acceptable error; SPI must meet minimum high/low times and transaction deadlines.
Explain: If a 12 MHz RCFAST source is already required elsewhere but both peripherals need only 1 MHz, a divide-by-12 branch gives the required peripheral clock.
Explain: A 151 $\mu$ s standby-to-active transition consumes more than.

Major section

Start With the Decision

Firmware is the code stored on a device.

Active time is when it is awake and doing work.
Deep sleep is a low-power state that takes more work to leave.
Current is the flow of charge that the power source must supply.
A firmware team has reduced active time and selected a deep-sleep state.

Major section

Deeper Sleep Is Not Always Cheaper

Current falls across the modes, but wake latency rises and fewer processor or peripheral states survive.

That tradeoff changes the correct comparison from current alone to charge over the whole interval.
The selected mode is therefore the one with the lowest measured cycle energy while still meeting the response requirement.

Sleep-mode comparison contrasts active, light sleep, and deep sleep by power draw, wake behavior, and state retention. A worked example checks whether repeated wake overhead can erase the current saving of a deeper mode. — Sleep-mode choice is a tradeoff, not a slogan: deeper modes reduce the floor current, but they also change wake latency, retained state, and reinitialization cost.

Major section

Worked 1 nW Average Front-End Budget

The arithmetic is easy; proving every term is not.

The review must show active duration from a trace, conversion energy at the actual voltage and resolution, reference settling, temperature leakage, and the measurement instrument's own floor.
If the front end needs ten times longer to settle, its amplifier contribution becomes 2 nW and the budget fails before a single packet is transmitted.
If a catalog front end clears the whole-device energy and accuracy budget, keep the design at practitioner depth.

Major section

Peripheral Clock-Current Budget

Including the still-running RCFAST source gives about 190.4 $\mu$ A before peripheral baselines, CPU, memory, and load current.

“Lower the clock” is only useful after separating clock-source current from the current switched inside each peripheral.
Their frequency-dependent contribution is then.
A clock that halves current but doubles active time may leave energy unchanged.

Major section

Peripheral Clock-Current Budget (continued)

where $f_s$ is the oscillator frequency, $f_i$ is the clock delivered to peripheral $i$ , and $k_i$ is its measured current-per-frequency slope.

If a 12 MHz RCFAST source is already required elsewhere but both peripherals need only 1 MHz, a divide-by-12 branch gives the required peripheral clock.
The divider is a large improvement over clocking both peripherals at 12 MHz, but turning off the unnecessary fast parent is better.
A UART typically needs a clock high enough to generate and oversample the requested baud with acceptable error; SPI must meet minimum high/low times and transaction deadlines.

Major section

Worked Radio-MCU Mode Ledger

Radio current spans orders of magnitude, so a linear average must be built from time in each mode.

Supply voltage, temperature, RF settings, and silicon revision affect these historical values; use them to learn the ledger, then replace them with measured target data.

One wireless MCU's supply current per mode on a log scale, and a one-hour duty-cycle schedule that averages 8.98 µA against a 10 µA target.

Major section

Worked CC2650 State Selection

At 48 MHz, the active-core model gives.

A 151 $\mu$ s standby-to-active transition consumes more than.
Approximating the transition at the active current gives 0.444 $\mu$ C, or about 1.33 $\mu$ J at 3 V, before useful instructions.
Retention uses more sleep current but may avoid cache refill or reinitialization.

CC2650-class core states with their retained resources and currents, the 151 µs wake toll, and the cache-retention break-even near 54 ms.

Deck summary

Key takeaways

Firmware is the code stored on a device.

Current falls across the modes, but wake latency rises and fewer processor or peripheral states survive.
The arithmetic is easy; proving every term is not.
Including the still-running RCFAST source gives about 190.4 $\mu$ A before peripheral baselines, CPU, memory, and load current.
where $f_s$ is the oscillator frequency, $f_i$ is the clock delivered to peripheral $i$ , and $k_i$ is its measured current-per-frequency slope.

Retrieval practice

Recall check 1 of 3

Battery Bruno says: answer from memory, then check your reasoning.

Q1Why is 'always use the deepest sleep mode' not universally correct?

ADeep modes always keep RAM and radio context ready.

BLight sleep always uses less current than deep sleep.

CWake overhead and lost state can outweigh the lower sleep current.

DSleep choice only depends on the battery's nominal capacity.

Show answer

Answer: C Frequent wakeups can make repeated reboot and reinitialization energy larger than the current saved during sleep.

Retrieval practice

Recall check 2 of 3

Battery Bruno says: answer from memory, then check your reasoning.

Q2Light sleep draws 0.8 mA; deep sleep draws 10 uA but needs a 10 mA-s reboot to wake. For a device that wakes every 5 seconds, which mode is cheaper?

ADeep sleep: the lower current saves charge between wakes.

BLight sleep: 4.0 mA-s versus deep sleep's 10.05 mA-s.

CThey cost about the same once reboot charge is included.

DDeep sleep, because it retains more state.

Show answer

Answer: B see answers page

Retrieval practice

Recall check 3 of 3

Battery Bruno says: answer from memory, then check your reasoning.

Q3A team power-gates an I2C sensor to remove its 1 mA sleep draw, and a probe confirms its supply rail is off, but the measured sleep current barely improves. The I2C pull-ups are still powered and the SDA and SCL lines are high. What is happening?

APowered pull-ups backfeed the unpowered sensor through protection diodes.

BConclude the sensor rail was not switched because the probe result reflects leakage through the disabled path.

CHigh I2C lines cannot draw current through powered pull-ups.

DProcessor sleep alone controls all peripheral leakage paths.

Show answer

Answer: A Cutting only the main supply pin leaves a back-door path: the pull-ups drive the high I2C lines into the sensor's input protection diodes.

Print reference

Answers 1 of 2

Answer key.

C · Frequent wakeups can make repeated reboot and reinitialization energy larger than the current saved during sleep.
B · Light sleep costs 0.8 x 5 = 4.0 mA-s. Deep sleep costs 0.010 x 5 + 10 = 10.05 mA-s, mostly the reboot. At a 5 s interval the deeper floor has not had time to repay the wake overhead.

Print reference

Answers 2 of 2

Answer key.

A · Cutting only the main supply pin leaves a back-door path: the pull-ups drive the high I2C lines into the sensor's input protection diodes.