Electronics & Circuits · Study deck

Logic Level and Level Shifting Contracts

Picture a 3.3 V controller reading a 5 V sensor board.

Voltage Vera is your guide for this deck.

logiclevelshifting

Voltage Vera, the module guide, in a scene from this chapter.

After studying this chapter

Learning objectives

You will be able to:

Compare driver output guarantees with receiver input thresholds for a digital interface.
Calculate HIGH noise margin from VOH and VIH and explain why margin matters.
Decide when 3.3 V to 5 V or 5 V to 3.3 V links need level shifting.
Choose between resistor dividers, active translators, open-drain pull-ups, and MOSFET bus shifters.

Major section

Start Simple

The wire may carry sensible bits on the bench while still stressing the input or missing a reliable high level.

The first safe move is to compare what one side guarantees with what the other side accepts.
The blue and red voltage markers are a clue that a passing bench bit is not yet a safe level match.

Major section

Start Simple (continued)

The second shows bits on the wire while the voltage markers still differ.

The third puts both boards' limits side by side; the fourth keeps the wire under review for signal shape, timing, and power state.
The checks below turn those visible gaps into a test before the boards are joined.
GPIO means general-purpose input/output, a pin used for a direct digital signal.
I2C means Inter-Integrated Circuit, a shared two-wire link for nearby parts.

Major section

Circuit note: Why the BSS138 needs the body diode's head start

The mathematical gist: In the standard BSS138 shifter, the gate is tied to the 3.3 V rail and the source faces the 3.3 V bus.

Pulling that side low therefore gives 3.30 V of gate-to-source drive.

Major section

Overview: Four Numbers Define a Logic Interface

When two devices use different supply rails, a shared word such as HIGH is not yet an electrical contract.

The central: TXS0108E marks the translation boundary, while ↔ AUTO DIR shows that signals may travel either way.

Bidirectional level shifter connecting 3.3 V and 5 V logic domains.

Major section

Check a Five-Volt Reply Before Connection

For this logic-level contract, a 3.3 V controller sends a clock to a 5 V sensor board and expects data back on another wire.

For this logic-level contract, a 3.3 V output cannot meet that stated threshold, so a direct controller-to-sensor HIGH has negative margin.

Major section

Check a Five-Volt Reply Before Connection (continued)

If the 5 V board stays on while the 3.3 V controller is off, a signal may feed current through an unpowered input.

At the return level-shifting boundary, a 5 V output can exceed a non-tolerant 3.3 V input even though the bit value is correct.
An open-drain bidirectional bus needs a different check.
The translator datasheet must state its powered-off behaviour.

Deck summary

Key takeaways

The wire may carry sensible bits on the bench while still stressing the input or missing a reliable high level.

The second shows bits on the wire while the voltage markers still differ.
The mathematical gist: In the standard BSS138 shifter, the gate is tied to the 3.3 V rail and the source faces the 3.3 V bus.
When two devices use different supply rails, a shared word such as HIGH is not yet an electrical contract.
For this logic-level contract, a 3.3 V controller sends a clock to a 5 V sensor board and expects data back on another wire.

Retrieval practice

Recall check 1 of 4

Voltage Vera says: answer from memory, then check your reasoning.

Q1A 3.3 V logic output (VOH about 3.3 V) drives a 5 V TTL input whose VIH is 2.0 V. Is the HIGH read reliably?

AYes: 3.3 V clears the TTL input's 2.0 V HIGH threshold.

BNo: every 5 V part supposedly requires a full 5 V HIGH level.

CNo: 3.3 V and 5 V logic supposedly never interoperate.

DAdd a pull-up because the push-pull 3.3 V output needs one to reach a valid high level.

Show answer

Answer: A see answers page

Retrieval practice

Recall check 2 of 4

Voltage Vera says: answer from memory, then check your reasoning.

Q2You must drive a 5 V CMOS input (VIH about 3.5 V) from a 3.3 V push-pull output. Can a resistor divider do the job?

AYes: a passive divider can boost a 3.3 V HIGH to 5 V.

BNo: a passive divider can only reduce, not raise, a voltage.

CYes: 3.3 V exceeds every 5 V CMOS HIGH threshold.

DNo: level shifting is supposedly never needed between these rails.

Show answer

Answer: B A passive divider only attenuates, so it cannot lift 3.3 V above the 5 V CMOS input’s stated 3.5 V HIGH threshold. Use a compatible level translator or another interface designed for both devices’ voltage ratings.

Retrieval practice

Recall check 3 of 4

Voltage Vera says: answer from memory, then check your reasoning.

Q3A powered peripheral drives a signal into an unpowered controller. What should the interface review prevent?

AOnly software retries; protection diodes isolate the off rail.

BClamp-current back-powering through the controller input protection path.

COnly low logic levels; high levels are always safe when the controller is off.

DOnly slow rise time; power sequencing cannot affect input safety.

Show answer

Answer: B The signal can lift an unpowered rail through an input clamp.

Retrieval practice

Recall check 4 of 4

Voltage Vera says: answer from memory, then check your reasoning.

Q4Several 3.3 V I2C sensors must communicate with a 5 V I2C controller. Which interface should replace a one-way resistor divider on this bidirectional open-drain bus?

AUse a one-way divider because I2C signaling can pass through it in both directions.

BA direct hard-wire path relying on input clamp diodes at 5 V

CA bidirectional MOSFET shifter with pull-ups on both sides

DAn inverting op-amp per line instead of open-drain level shifting

Show answer

Answer: C Open-drain bus lines need both sides to pull low, so a one-way divider fails.

Print reference

Answers

Answer key.

A · 5 V TTL only needs 2.0 V to register a HIGH, so a 3.3 V output clears it with over a volt of noise margin. The reverse case, 5 V into a 3.3 V input, is the dangerous one.
B · A passive divider only attenuates, so it cannot lift 3.3 V above the 5 V CMOS input’s stated 3.5 V HIGH threshold. Use a compatible level translator or another interface designed for both devices’ voltage ratings.
B · The signal can lift an unpowered rail through an input clamp.
C · Open-drain bus lines need both sides to pull low, so a one-way divider fails.