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ADC Fundamentals: Architectures and Interfaces

The required resolution is known, but a bit count does not choose the converter.

Voltage Vera is your guide for this deck.

analogdigital

Voltage Vera, the module guide, in a scene from this chapter.

After studying this chapter

Learning objectives

You will be able to:

Explain: For an ideal converter that rounds to the nearest level, its magnitude is bounded by roughly half a step: $V_{ref}/2^{n+1}$ for a unipolar span from zero to $V_{ref}$.
Explain: The photograph therefore reconnects the application table to the chapter's running pipeline: a “basic monitoring” sensor is simple only after its analogue behaviour, conditioning circuit, reference, and required resolution have been checked.
Explain: SAR logic proposes a code, the internal DAC turns that proposal into a comparison voltage, and the comparator reports whether the proposal is above or below the held input.

Major section

ADC Architectures

Once the voltage step is clear, the next question is how the converter finds that code.

The architecture determines whether the design prioritizes microsecond conversion, high resolution, low current, or simple integration.
Real-world ADCs use different conversion techniques optimized for speed, accuracy, and power consumption.
The most common architecture in IoT microcontrollers is the Successive Approximation Register (SAR) ADC.

SAR ADCs dominate IoT applications due to their balance of speed, resolution, and power efficiency.

Major section

ADC Architectures (continued)

SAR is a balanced choice, not a universal winner.

The sample-and-hold keeps the unknown input steady.
SAR logic proposes a code, the internal DAC turns that proposal into a comparison voltage, and the comparator reports whether the proposal is above or below the held input.
The positions are comparative, not a substitute for measured specifications.

Major section

ADC Architectures (continued)

The logic keeps or clears one bit and repeats with a finer proposal.

That feedback loop is the physical meaning of the “binary search” described next.
A flash ADC makes many comparisons in parallel, trading circuit area and power for very low conversion latency.
A sigma-delta ADC uses oversampling, feedback, and digital filtering to favour fine low-bandwidth measurements over immediate results.

Major section

Analog-Digital Interface Challenges

Architecture is only part of measurement quality.

The front end still has to protect the ADC from noise, source impedance, reference drift, and out-of-band signal content.
Disturbance can enter with the signal, through the power and reference rails, through the circuit's resistive elements, or through uncertain sampling time.

Clean ADC readings require addressing multiple noise sources with appropriate filtering and grounding strategies.

Major section

Analog-Digital Interface Challenges (continued)

Quantization then adds a different limitation: even a perfectly clean held voltage must be assigned to one available code.

The diagnostic order is to identify where uncertainty enters, limit it there, and only then ask whether ADC resolution is the remaining constraint.
Quantization Noise (Inherent ADC Limitation): Quantization error is the difference between the input and the representative level selected for its code.
A higher-resolution converter makes that ideal step smaller.

Major section

Analog-Digital Interface Challenges (continued)

For an ideal converter that rounds to the nearest level, its magnitude is bounded by roughly half a step: $V_{ref}/2^{n+1}$ for a unipolar span from zero to $V_{ref}$.

Oversampling and averaging can reveal finer information when suitable noise moves the signal across code boundaries, but they do not correct reference error, clipping, or systematic nonlinearity.
Simply collecting more readings may not help as much as it would for independent white noise because successive errors can be correlated.
Thermal Noise (Johnson-Nyquist Noise): Thermal noise is random voltage noise associated with resistance and temperature.

Major section

Analog-Digital Interface Challenges (continued)

Because these mechanisms enter at different points, “use more bits” cannot be the universal remedy.

Chopper-stabilised front ends, modulation techniques, careful component choice, and a bandwidth appropriate to the signal are possible controls; the correct choice depends on whether the wanted measurement includes DC.
Its RMS value over bandwidth $Δf$ is described by $V_{rms}=\sqrt{4kTR\Delta f}$.
Best Practices for Clean ADC Readings:: The common thread is to match every remedy to a mechanism.

Major section

Typical Microcontroller ADCs

LSB = Least Significant Bit (smallest measurable change).

Everything below that boundary operates on the resulting code: processing may calibrate or convert units, formatting gives the reading a data representation, and packet and network stages move it elsewhere.

From physical measurement through signal conditioning and ADC conversion to the downstream digital stages that turn a raw reading into usable system data.

Major section

Real-World IoT ADC Applications

Each connection corresponds to a question the application table must answer.

In the linked figure in Part 1-iot-requirements, the input connection prompts questions about the sensor's voltage span, source impedance, useful bandwidth, and required smallest trustworthy change.
The opening light-sensor example is a useful concrete case.

Match your sensor application to the appropriate ADC type based on accuracy needs and signal bandwidth.

Major section

Real-World IoT ADC Applications (continued)

The digital side prompts questions about how quickly results are needed and how the processor will read them.

It changes resistance, so a divider or other front end must first turn that change into a voltage within the ADC's input range.
Light changes the track's resistance; the surrounding circuit converts that resistance into a voltage; the built-in ADC assigns the voltage a code.
The photograph therefore reconnects the application table to the chapter's running pipeline: a “basic monitoring” sensor is simple only after its analogue behaviour, conditioning circuit, reference, and required resolution have been checked.

Major section

SAR ADC Sensor Conversion

The big picture: A successive approximation register (SAR) ADC performs a 12-step binary search to determine which of 4,096 discrete voltage levels most closely matches the analog sensor input.

The sample-and-hold first freezes the sensor's 2.0 V input, giving the comparator a stable target.
The next proposal adds half of the remaining range, producing 2.475 V; that proposal is too high, so the next bit is cleared.
By the time the least-significant bit has been tested, the register itself is the output code.
Because the held input is higher, the most-significant bit remains set.

Major section

Summary

At every branch, carry forward the input range, reference quality, and noise evidence established earlier.

Bandwidth constrains how quickly the converter and front end must respond.
The destination boxes are starting classes for investigation; a real selection still requires data-sheet limits and measurements.

Start with signal bandwidth, sensor accuracy, and power budget before deciding whether a simple 8-bit, default 10-12-bit, or precision 16-bit ADC is justified.

Deck summary

Key takeaways

Once the voltage step is clear, the next question is how the converter finds that code.

SAR is a balanced choice, not a universal winner.
The logic keeps or clears one bit and repeats with a finer proposal.
Architecture is only part of measurement quality.
Quantization then adds a different limitation: even a perfectly clean held voltage must be assigned to one available code.

Retrieval practice

Recall check 1 of 4

Voltage Vera says: answer from memory, then check your reasoning.

Q1You're designing a battery-powered IoT scale that needs to measure weight with 0.1 gram precision. Which ADC architecture is most appropriate?

AFlash ADC - for fastest response time

BSAR ADC - built into most microcontrollers

CSigma-Delta ADC - highest resolution

DPipeline ADC - for video-rate sampling

Show answer

Answer: C Precision weighing requires high resolution (16-24 bit) to detect small weight changes.

Retrieval practice

Recall check 2 of 4

Voltage Vera says: answer from memory, then check your reasoning.

Q2Your temperature sensor readings fluctuate by +/-5 counts even when the temperature is stable. What is the most effective first step to reduce this noise?

AUpgrade to a 16-bit ADC for higher resolution

BAverage 16-64 samples to reduce random noise

CIncrease the sampling rate to capture more data

DUse a faster microcontroller for quicker processing

Show answer

Answer: B Averaging multiple samples is the most cost-effective way to reduce random noise.

Q3Which ADC resolution provides the smallest quantization error for a 5V reference?

A8-bit (19.5 mV/step)

B10-bit (4.88 mV/step)

C12-bit (1.22 mV/step)

D16-bit (0.076 mV/step)

Show answer

Answer: D Higher resolution (more bits) = smaller step size = lower quantization error.

Retrieval practice

Recall check 3 of 4

Voltage Vera says: answer from memory, then check your reasoning.

Q4You're measuring a 2.5V signal with an ESP32's 12-bit ADC (3.3V reference). Your sensor has +/-2% accuracy. What determines the measurement precision?

AThe 12-bit resolution (0.8mV steps) is the limiting factor

BThe ESP32's ADC is too noisy for precision measurements

CSensor accuracy dominates the error budget

DYou need a 16-bit ADC for reliable measurements

Show answer

Answer: C

Q5Place each ADC element where it lives so you can trace how an analog voltage becomes a defensible digital code.

AAnalog input

BReference voltage

CDigital code

DSampling clock

Show answer

Answer: A Separate signal conditioning, conversion decisions, and the delivered result so you can follow the evidence chain from voltage to code.

Retrieval practice

Recall check 4 of 4

Voltage Vera says: answer from memory, then check your reasoning.

Q6You're designing an environmental monitoring station with a +/-2% accuracy humidity sensor. The readings update every 10 seconds. What ADC approach is most cost-effective?

AUse the ESP32's built-in 12-bit ADC with software averaging

BAdd an external 24-bit ADS1256 for maximum precision

CUse a fast 8-bit flash ADC for real-time response

DImplement a 16-bit pipeline ADC for balanced performance

Show answer

Answer: A

Print reference

Answers

Answer key.

C · Precision weighing requires high resolution (16-24 bit) to detect small weight changes.
B · Averaging multiple samples is the most cost-effective way to reduce random noise.
D · Higher resolution (more bits) = smaller step size = lower quantization error.
C
A · Separate signal conditioning, conversion decisions, and the delivered result so you can follow the evidence chain from voltage to code.
A