Electronics & Circuits · Study deck
ADC Architecture and Resolution
Picture a fast motor-current pulse and a slow strain reading.
Voltage Vera is your guide for this deck.
After studying this chapter
Learning objectives
You will be able to:
- Choose SAR or sigma-delta ADCs based on speed, resolution, latency, and IoT signal bandwidth.
- Calculate least significant bit size and separate converter resolution from usable measurement accuracy.
- Check SAR source impedance, sample-capacitor settling, and acquisition-time constraints before trusting readings.
- Use oversampling only when throughput and dither/noise conditions can support extra effective bits.
Major section
Start Simple
Two converters can advertise the same number of bits yet miss different parts of those signals.
- An analog-to-digital converter is a circuit that turns a measured voltage into a number; ADC is its short name.
- Bandwidth means the range of signal changes the measurement path must carry.
- Latency means the time from an input change to the result that matters.
- This runway does not prove that one converter design is best for every sensor.
Major section
Phoebe's Field Notes: Where +9 dB and +15 dB Per Octave Come From
The mathematical gist.: An order-$L$ noise shaper makes in-band quantisation-noise power fall as $1/OSR^{2L+1}$.
- At first order and OSR 64, the idealised gain is 54.2 dB, or 9.00 bits.
Major section
Choose an ADC for a Millivolt Bridge
For this ADC architecture, a pressure bridge changes by only a few millivolts while a nearby motor throws fast noise onto its cable.
- At the converter resolution boundary, a code is trustworthy only after the input node has settled far enough.
- At the converter resolution boundary, oversampling does not create information from a fixed error.
Major section
Choose an ADC for a Millivolt Bridge (continued)
A stable 3 mV offset remains 3 mV after any number of averages.
- In the millivolt architecture, for a 0–3.3 V, 12-bit ADC, one ideal step is 3.3/4096=0.000806 V, or 0.806 mV.
- For this ADC architecture, a 6 mV bridge change spans only 6/0.806=7.44 ideal codes before noise and offset.
- The bridge also sets a rate limit.
Major section
Choose an ADC for a Millivolt Bridge (continued)
Adding a gain of 100 would turn 6 mV into 0.600 V, but the amplifier’s offset, range, bandwidth, and saturation then enter the ADC architecture contract.
- In the millivolt architecture, with suitable independent noise, averaging four samples cuts the random part by √4 and can add about one effective bit.
- A sigma-delta ADC may trade bandwidth for strong low-frequency resolution, while a SAR ADC may suit a faster multiplexed path; the pressure signal’s job decides which trade is useful.
- The final ADC choice should state its usable input span, settled rate, measured noise, and allowed source resistance.
Major section
Choose an ADC for a Millivolt Bridge (continued)
If useful pressure changes end at 20 Hz, the ADC must sample above 40 samples/s before transition space is allowed.
- A practical rate needs room for the analogue filter to fall before Nyquist.
- At 200 samples/s, Nyquist is 100 Hz, leaving an 80 Hz transition band above the 20 Hz signal.
- The chosen ADC architecture must then deliver settled codes at that rate, not merely advertise a much faster serial clock.
Major section
Release Checklist
LSB size is calculated from Vref / 2^N and compared with sensor accuracy, reference noise, and analog-front-end noise.
- SAR acquisition time is long enough for the source impedance and sample capacitor to settle within the target error band.
- Any high-impedance divider or sensor output is buffered, slowed, or sampled with an acquisition time supported by the data sheet.
- Sigma-delta latency, decimation-filter delay, and update rate are acceptable for the control loop or telemetry interval.
Deck summary
Key takeaways
Two converters can advertise the same number of bits yet miss different parts of those signals.
- The mathematical gist.: An order-$L$ noise shaper makes in-band quantisation-noise power fall as $1/OSR^{2L+1}$.
- For this ADC architecture, a pressure bridge changes by only a few millivolts while a nearby motor throws fast noise onto its cable.
- A stable 3 mV offset remains 3 mV after any number of averages.
- Adding a gain of 100 would turn 6 mV into 0.600 V, but the amplifier’s offset, range, bandwidth, and saturation then enter the ADC architecture contract.
Retrieval practice
Recall check 1 of 3
Voltage Vera says: answer from memory, then check your reasoning.
Q1A load cell scale must resolve sub-gram weight changes but only needs a reading a few times per second. Which ADC architecture fits, and why?
Show answer
Answer: A Sigma-delta oversamples and noise-shapes to reach 16-24 bits, ideal for slow precision DC signals like load cells (the HX711 is a 24-bit sigma-delta made for exactly this).
Retrieval practice
Recall check 2 of 3
Voltage Vera says: answer from memory, then check your reasoning.
Q2You average 16 SAR readings of a very clean, essentially noise-free DC voltage to gain resolution, but every reading is the identical code and the average shows no extra resolution. What is the fix?
Show answer
Answer: B Without dither, a clean DC input lands on a single code every time, so the average equals that code.
Retrieval practice
Recall check 3 of 3
Voltage Vera says: answer from memory, then check your reasoning.
Q3A first-order sigma-delta modulator's oversampling ratio is doubled (say 64x to 128x). Approximately how much does the ideal in-band SNR improve?
Show answer
Answer: A First-order noise shaping yields about +9 dB (~1.5 bits) per doubling of the oversampling ratio, far more than the +3 dB of plain oversampling. First-order noise shaping gives about +9 dB per octave of oversampling ratio.
Print reference
Answers 1 of 2
Answer key.
- A · Sigma-delta oversamples and noise-shapes to reach 16-24 bits, ideal for slow precision DC signals like load cells (the HX711 is a 24-bit sigma-delta made for exactly this).
- B · Without dither, a clean DC input lands on a single code every time, so the average equals that code.
Print reference
Answers 2 of 2
Answer key.
- A · First-order noise shaping yields about +9 dB (~1.5 bits) per doubling of the oversampling ratio, far more than the +3 dB of plain oversampling. First-order noise shaping gives about +9 dB per octave of oversampling ratio.