ADC Resolution Visualizer

ADC Resolution Visualizer

Watch nominal ADC bits become useful sensor resolution, then trade averaging time for lower independent noise

animation
adc
quantization
sensors
beginner
Interactive ADC resolution visualizer for ADC count width, quantization, RMS noise, ideal averaging, ENOB, acquisition time, and sensor sensitivity.
Interactive animation ADC fundamentals

ADC Resolution Visualizer

Watch a smooth sensor voltage move through sample-and-hold, quantization bins, and a digital code register. Then see how independent noise reduces useful bits and how averaging buys resolution by spending acquisition time.

8-bitSelected resolution
12.89 mVVoltage per count
430Current code
Setup
See how analog voltage becomes discrete digital codes.
Try
Choose “12-bit noisy LM35”, then change only Average count from 1 to 64.
Observe
Useful bits rise from 9.19 to 11.6 while acquisition time rises from 1.00 ms to 64.0 ms.
Explain
Nominal bits set ideal count width; noise, averaging, and sensor sensitivity set useful resolution.

ADC Setup

Live Numbers

Levels
1,024
Step Size
4.88 mV
Digital Code
430
Binary
0110101110
Error Band
+/-2.44 mV
Useful bits (ENOB)
9.19 bit
Effective interval
5.64 mV
Smallest quantity
0.564 deg C
Acquisition time
1.00 ms

Analog to Digital Conversion Animation

The moving cursor samples the analog wave. The ADC maps that sample into one code bin and emits the digital code shown below.

Sample
1. Analog sensorSmooth voltage changes continuously.
2. Sample holdA moment in time is captured.
3. QuantizerThe voltage lands inside a bin.
4. Digital codeThe bin becomes a binary number.
0 V2.50 V5.00 V
analog voltage quantized ADC output current sample quantization error RMS-equivalent uncertainty band
Digital code register
OK

Fit for coarse monitoring

A 12-bit ADC does not always resolve twelve useful bits.Independent noise leaves 9.19 useful bits at M = 1.
Learning Support

Beginner Model

Bits create bins. An 8-bit ADC has 256 bins, a 10-bit ADC has 1024 bins, and a 12-bit ADC has 4096 bins across the reference voltage.

Design Rule

Your ADC step should be smaller than the smallest useful sensor change. Extra bits do not help if sensor noise is larger than the step.

What to Notice

  • More bits make the staircase finer.
  • Lower reference voltage also makes each step smaller.
  • Noise can make extra bits unusable.
Quick Reference
Bits Levels 3.3 V Step 5 V Step Typical Fit
Technical Notes

Code Width

This teaching model uses LSB = Vref / 2^N and code range 0 to 2^N - 1 for an ideal unipolar ADC.

Quantization Error

The orange band is input +/- sqrt(3) sigma_total: an RMS-equivalent band whose half-width equals one effective quantization interval. It is not a confidence interval.

Noise-Limited Fit

Find Minimum now includes the selected noise-count estimate, so it does not recommend more bits while ignoring a noisy sensor path.

Technical boundaries. This is an ideal unipolar ADC plus independent RMS noise and ideal uncorrelated averaging. It does not simulate offset, gain error, DNL/INL, missing codes, aperture jitter, reference drift, aliasing, correlated or 1/f noise, sensor nonlinearity, calibration, or saturation outside the selected span. Averaging improves only the independent-noise term; it cannot recover biased or correlated measurements.