Math Bridge: Sampling and ADC Datasheet Limits

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Math BridgeSensorsStruggle-friendly runway

When does a datasheet number lose the signal?

One thread from samples and ADC bins to the chapter's 350 Hz alias and 12-bit noise floor.

Phoebe, the physics guidePhoebe guides
The one targetRead time and amplitude limits together.
The chapter case400 Hz, 350 Hz, 3.3 V, and 12 bits.
What it buys youCatch aliasing before firmware logs it.

A field team faces an unresolved physical question: When does a datasheet number lose the signal? They must answer it before changing sample rate in hertz on the real device. Predict the direction first.

See the relationship before changing it

The figure reads from left to right. The blue card is sample rate in hertz. The middle card applies this page's relationship. The green card is apparent component. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This added model holds every other chapter fixture fixed, so the numeric fixture does not switch without explanation.

Sample rate in hertz changes apparent component An input card leads through the page relationship to the apparent component result. SET INPUT ONE CONTROL APPLY RULE predict calculate check units READ RESULT
Walk the arrows. Raising fs through 700 Hz stops the fold. It does not change the converter's voltage bins, because those belong to a different datasheet line.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline for sample rate in hertz is 400.

  2. 2

    Name the relationship. Nyquist=fs/2; falias=|nfs-f|; q=VFSR/2^N; tsettle=RsCs(N+1)ln2

  3. 3

    Substitute the chapter fixture. Set sample rate in hertz to 400. The page ledger gives apparent component as 50 Hz.

  4. 4

    Read the result. Keep Hz beside the value. Use it only inside the technical boundary on this page.

Predict, then change sample rate in hertz

Try Predict the direction of apparent component. Move one control, calculate, then check your prediction.

400
Chapter baseline
Apparent component

Observe Raising fs through 700 Hz stops the fold. It does not change the converter's voltage bins, because those belong to a different datasheet line. Reset the control to 400 and compare apparent component.

Explain Only sample rate in hertz moves here. The other chapter fixtures remain fixed.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only sample rate in hertz moves. Field effects named in the page's technical boundary stay fixed.

Honesty note. This teaching model changes only sample rate in hertz. It replays the chapter fixture; it is not a field prediction.

1. See two different ladders

Sampling places a ladder along time. Quantisation places another ladder along voltage. A signal can fall between the rungs of either ladder.

Phoebe: Fast enough in time does not mean fine enough in voltage, and extra ADC bits cannot repair a frequency that already folded.

2. Name the time limit

1

Set the ceilingA sample rate fs can preserve frequencies only through fs/2.

2

Find the copyChoose the nearest whole multiple n·fs to the real frequency.

3

Measure the foldfalias=|n·fs−f| when f is above Nyquist.

3. Name the voltage limit

An N-bit converter has 2^N levels across its full-scale range.

q=VFSR/2^N; σq=q/√12; SNRideal≈6.02N+1.76 dB

The source resistance and sample capacitor add a settling check: approximately RsCs(N+1)ln2 for half-LSB accuracy.

4. Try the sample rate

Nyquist=fs/2; falias=|nfs−f|; q=VFSR/2^N; tsettle=RsCs(N+1)ln2

TryMove the sampling line while the chapter's catalog-typical 350 Hz component and 12-bit channel stay fixed.

Nyquist ceiling
Apparent component
Code levels
ADC step
ADC RMS floor
Ideal ADC ceiling
Half-LSB settle
Sample period
Period used settling

ObserveAt 400 Hz, Nyquist is 200 Hz, so the true 350 Hz component appears as 50 Hz. The 12-bit voltage floor remains 0.806 mV per code and 0.233 mV RMS.

ExplainRaising fs through 700 Hz stops the fold. It does not change the converter's voltage bins, because those belong to a different datasheet line.

Technical boundaries.

The alias model treats one pure component and an ideal sampler.

an analogue anti-alias filter
Needs separate evidence
effective-bit loss
Needs separate evidence
reference noise
Needs separate evidence
nonlinearity
Needs separate evidence
aperture jitter
Needs separate evidence
sensor noise
Needs separate evidence
The RC settling estimate assumes a first-order source and the stated 5 pF sample capacitor
Needs separate evidence

Use field evidence or a deeper model before release.

5. Work the voltage ladder

2^12=4096; q=3.3/4096=0.806 mV
σq=0.806/√12=0.233 mV; SNRideal=74.0 dB

6. Check acquisition settling

RsCs=10 kΩ×5 pF=50.0 ns
tsettle≈50 ns×13×ln2=451 ns

The 400 Hz period is 2.50 ms, so ideal settling occupies only about 0.018% of it. That margin is evidence, not permission to ignore a different sensor's source impedance.

7. Check yourself

Why does 350 Hz appear as 50 Hz at 400 samples/s?
Answer: It is above the 200 Hz Nyquist ceiling and folds to |400−350|=50 Hz.
What does adding one ADC bit change?
Answer: It doubles the code count and halves q; it does not change Nyquist.
Can a digital filter recover the original 350 Hz after aliasing?
Answer: No. After sampling, the 50 Hz alias is indistinguishable from a real 50 Hz component without prior evidence.
Honesty boundary.

These are the chapter inputs, worked results, and named teaching assumptions.

This chapter intentionally does not specify one sensor part
Sensor scale, pressure, or digital result
3.3 V range
Voltage or voltage-step value
12 bits
Digital resolution or converter setting
400 Hz sample rate
Frequency, sample rate, or event rate
350 Hz component
Frequency, sample rate, or event rate
10 kΩ source
Resistance or impedance value
5 pF sample capacitor are explicitly catalog-typical teaching values
Named teaching assumption

The worked results trace to those stated assumptions, not to a hidden product claim.

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