Math Bridge: Sampling and Quantisation Floors

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Math BridgeSensorsStruggle-friendly runway

Two floors under every sensor reading

One thread from the DHT22's two-second interval to Nyquist, ADC steps, quantisation noise, and the STUCK check.

Phoebe, the physics guidePhoebe guides
The one targetSeparate a timing limit from a value-resolution limit.
The chapter case2 s DHT22 reads and a 12-bit, 0–100% soil ADC.
What it buys youKnow what averaging can and cannot repair.

A field team faces an unresolved physical question: Two floors under every sensor reading They must answer it before changing adc bit depth on the real device. Predict the direction first.

See the relationship before changing it

The figure reads from left to right. The blue card is adc bit depth. The middle card applies this page's relationship. The green card is sample rate. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This added model holds every other chapter fixture fixed, so the numeric fixture does not switch without explanation.

ADC bit depth changes sample rate An input card leads through the page relationship to the sample rate result. SET INPUT ONE CONTROL APPLY RULE predict calculate check units READ RESULT
Walk the arrows. Every readout uses the formulas above; changing bits changes the value floor but leaves the chapter's 0.2500 Hz timing ceiling unchanged.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline for adc bit depth is 12.

  2. 2

    Name the relationship. f_s=1/T; f_N=f_s/2; q=range/2^N; σ_q=q/√12; SNR=6.02N+1.76

  3. 3

    Substitute the chapter fixture. Set adc bit depth to 12. The page ledger gives sample rate as 0.5000 Hz.

  4. 4

    Read the result. Keep Hz beside the value. Use it only inside the technical boundary on this page.

Predict, then change adc bit depth

Try Predict the direction of sample rate. Move one control, calculate, then check your prediction.

12
Chapter baseline
Sample rate

Observe Every readout uses the formulas above; changing bits changes the value floor but leaves the chapter's 0.2500 Hz timing ceiling unchanged. Reset the control to 12 and compare sample rate.

Explain Only adc bit depth moves here. The other chapter fixtures remain fixed.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only adc bit depth moves. Field effects named in the page's technical boundary stay fixed.

Honesty note. This teaching model changes only adc bit depth. It replays the chapter fixture; it is not a field prediction.

1. Start with two kinds of rounding

A sensor system picks moments in time and codes on a value scale. The DHT22 allows one reading every 2 s. The soil ADC stores one of 4,096 codes. A missed fast change is a timing error; a rounded moisture value is a code-size limit.

Phoebe: Keep these floors separate. More ADC bits cannot recover a change sampled too slowly. Faster sampling cannot make a 12-bit code infinitely fine.

2. Turn the interval into a Nyquist ceiling

1

Invert timef_s=1/T=1/2 s=0.500 Hz.

2

Apply Nyquistf_max=f_s/2=0.250 Hz.

3

Read the period1/0.250 Hz=4.00 s per fastest full cycle.

Content above that limit can fold into a false slower signal. It does not simply disappear.

3. Turn bits into a moisture step

1

Count the codes2^12=4,096.

2

Divide the rangeq=100%/4,096=0.0244% per count.

3

Find RMS rounding noiseσ_q=q/√12=0.00705%.

4

Find ideal SNR6.02(12)+1.76=74.0 dB.

4. Try the ADC bit depth

f_s=1/T; f_N=f_s/2; q=range/2^N; σ_q=q/√12; SNR=6.02N+1.76

TryMove from 8 to 16 bits while the chapter's two-second interval and 0–100% scale stay fixed.

Code levels
Sample rate
Nyquist ceiling
Moisture step
RMS code noise
STUCK threshold / floor
Ideal SNR

ObserveAt 12 bits the page shows 4,096 levels, 0.0244% per count, 0.0071% RMS, a 1.42× threshold ratio, and 74.00 dB.

ExplainEvery readout uses the formulas above; changing bits changes the value floor but leaves the chapter's 0.2500 Hz timing ceiling unchanged.

Technical boundaries.

The q/√12 model assumes quantisation error explores a code bin.

other limits
Needs separate evidence

Use field evidence or a deeper model before release.

5. Compare the STUCK threshold

The chapter flags a 20-reading window when its standard deviation is below 0.01%. The ideal 12-bit floor is 0.00705%, so 0.01/0.00705=1.42. A real live sensor usually has extra noise. An unusually quiet sequence can therefore be evidence of a frozen ADC.

6. Say what averaging changes

For independent random noise, averaging N readings reduces the RMS noise by √N. It does not reconstruct a frequency that already aliased, and it does not revive a stuck code. The fix must match the failure: sample fast enough, use adequate code resolution, or repair the sensor path.

7. Check yourself

What is the sample rate for one reading every 2 s?
Answer: f_s=1/T=1/2=0.500 Hz.
What is one count on a 12-bit 0–100% scale?
Answer: 100/4,096=0.0244% per count.
Can averaging repair aliasing?
Answer: No. Averaging can reduce suitable random noise, but aliased content has already been relabelled as another frequency.
Honesty boundary.

These are the chapter inputs, worked results, and named teaching assumptions.

2 s interval
Time, interval, or service-life value
12-bit ADC
Digital resolution or converter setting
0–100% scale
Percentage, ratio, or gain
20-reading STUCK window
Device, payload, or sample count
0.01% threshold come from the chapter
Percentage, ratio, or gain

The 0.500 Hz, 0.250 Hz, 4.00 s, 4,096, 0.0244%, 0.00705%, 1.42×, and 74.0 dB results follow from the displayed formulas. The model does not claim an ideal ADC describes field noise.

Return to the chapter with the maths unpacked →