Math Bridge: Stacked pull-ups and antenna gain

← Back to Selecting and Integrating Components
Math BridgePrototypingStruggle-friendly runway

Why can adding a harmless breakout erase electrical margin?

Count parallel pull-ups on one bus, then see why the antenna fitted to a radio module changes effective radiated power without a firmware edit.

Voltage Vera, the prototyping guideVoltage Vera guides
The one targetTurn hidden module circuits into one acceptance ledger.
The chapter caseThree 10.0 kΩ pull-ups and one 14.0 dBm radio.
What it buys youCheck the assembled system, not just each catalog page.

A field team faces an unresolved physical question: Why can adding a harmless breakout erase electrical margin? They must answer it before changing boards on the real device. Predict the direction first.

See the relationship before changing it

The figure reads from left to right. The blue card is boards. The middle card applies this page's relationship. The green card is equivalent pull-up. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This added model holds every other chapter fixture fixed, so the numeric fixture does not switch without explanation.

Boards changes equivalent pull-up An input card leads through the page relationship to the equivalent pull-up result. SET INPUT ONE CONTROL APPLY RULE predict calculate check units READ RESULT
Walk the arrows. Independent hidden parts can share a node or port, so system acceptance must follow the actual assembled topology.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline for boards is 3.

  2. 2

    Name the relationship. Req=10.0/3=3.33 kohm I=3.30 V/3.33 kohm=0.990 mA Sink share=0.990/3.00=33.0% EIRP=14.0+2.15=16.15 dBm Radiated-power ratio=10^(2.15/10)=1.64x

  3. 3

    Substitute the chapter fixture. Set boards to 3. The page ledger gives equivalent pull-up as 3.33 kohm.

  4. 4

    Read the result. Keep kohm beside the value. Use it only inside the technical boundary on this page.

Predict, then change boards

Try Predict the direction of equivalent pull-up. Move one control, calculate, then check your prediction.

3
Chapter baseline
Equivalent pull-up

Observe Independent hidden parts can share a node or port, so system acceptance must follow the actual assembled topology. Reset the control to 3 and compare equivalent pull-up.

Explain Only boards moves here. The other chapter fixtures remain fixed.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only boards moves. Field effects named in the page's technical boundary stay fixed.

Honesty note. This teaching model changes only boards. It replays the chapter fixture; it is not a field prediction.

1. See the connections the module hides

Each pull-up joins the same bus node to the same supply, so the paths are parallel. Each antenna reshapes the same radio power, so its gain belongs in the transmitted-link record.

Voltage Vera: Draw the whole assembled node before adding ratings; topology decides the equation.

2. Name every algebra move

1

Combine equal branchesReq=Rsingle/n.

2

Find LOW currentI=VDD/Req.

3

Use the ratingShare=I/Irated×100%.

4

Add decibelsEIRP=Ptx+Gant.

5

Undo gain decibelsPower ratio=10^(G/10).

3. Reproduce three stacked boards

Req=10.0/3=3.33 kΩ
I=3.30 V/3.33 kΩ=0.990 mA
Sink share=0.990/3.00=33.0%
EIRP=14.0+2.15=16.15 dBm
Radiated-power ratio=10^(2.15/10)=1.64×

One board sinks 0.330 mA, two sink 0.660 mA, and three sink 0.990 mA. The radio number is separate but teaches the same review habit: the fitted support part changes system behavior.

4. Try the board count

TryAdd identical breakout pull-ups while the bus voltage and device sink rating stay fixed.

Boards
Equivalent pull-up
LOW sink current
Sink rating used
Radio EIRP
Radiated-power ratio

ObserveEach identical board lowers Req and raises sink current; the radio outputs stay fixed because board count is not an RF input.

ExplainIndependent hidden parts can share a node or port, so system acceptance must follow the actual assembled topology.

Technical boundaries.

This is a DC pull-up and ideal antenna-gain ledger, not a bus-timing or radiation solver.

I2C
Rise time also depends on capacitance, speed, device leakage, and VOL limits
Rating
The 3.00 mA figure must come from the exact device and voltage condition
Antenna
Cable loss, mismatch, enclosure, ground plane, pattern, and regulation affect real EIRP

Measure bus edges and LOW voltage on the assembled bus; measure or certify the installed RF path.

5. Test the assembled module stack

Inventory every pull-up and level shifter, then scope SDA and SCL at the target speed. Record antenna part, ground-plane condition, connector loss, enclosure, channel, and measured or declared EIRP.

6. Record the evidence state

Store module revisions, pull-up values, bus voltage, device sink and VOL limits, capacitance, clock rate, radio setting, antenna gain reference, losses, and the exact assembled configuration tested.

7. Check yourself

Why do three 10 kΩ pull-ups make 3.33 kΩ?
Answer: Equal parallel paths divide resistance by their count: 10/3=3.33 kΩ.
Why does LOW current triple?
Answer: The bus voltage stays fixed while equivalent resistance falls to one third, so I=V/R triples.
Does 2.15 dBi create transmitter power?
Answer: No. It ideally redirects existing power, producing 1.64× power density in the reference direction.
Honesty boundary.

The arithmetic reproduces the chapter's catalog-typical pull-up, sink-rating, radio-setting, and antenna examples.

3.33 kΩ
An equal-resistor DC result, not a complete I2C timing check
33.0%
One named sink-rating comparison, not guaranteed LOW-level margin
1.64×
An ideal gain ratio, not a field RSSI promise

Correct, not complete: this component ledger does not approve a bus or radio module integration.

Return to Selecting and Integrating Components with the maths unpacked →