Math Bridge: DAC and PWM Output

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Math BridgeElectronicsStruggle-friendly runway

When does a switching waveform behave like an analogue voltage?

Compare a DAC's code spacing with PWM average, RC smoothing, ripple, and settling.

Eddie, the electronics guideEddie guides
The one targetSeparate desired average voltage from unwanted switching ripple.
The chapter case8-bit 5 V DAC and 1 kHz PWM through 10 kohm and 0.22 microfarad.
What it buys youAn output choice tied to step size, ripple, and response time.

A technician must decide whether average pwm voltage is safe before changing pwm duty on the real device. The result is unresolved until the rule and units are checked. Predict the direction first.

See the relationship before changing it

The figure reads from left to right. The blue card is pwm duty. The middle card applies this page's rule. The green card is average pwm voltage. Walk the arrows once: set the input, apply the rule, then read the result with its unit.

The retained audit below checks several chapter fixtures. This model keeps those stated values fixed and changes only pwm duty, so the numeric fixture does not switch without explanation.

PWM duty changes average pwm voltage An input card leads through the rule average = 5.00 V x duty / 100 to the average pwm voltage result. INPUT PAGE INPUT APPLY THE RULE predict calculate check units OUTPUT RESULT
Walk the arrows. Duty changes the average while the fixed RC sets the smoothing time.

Derive the baseline in four named moves

  1. 1

    Name the input. The chapter baseline is 75 %.

  2. 2

    Name the relationship. average = 5.00 V x duty / 100

  3. 3

    Substitute with units. 5.00 V x 75 / 100 = 3.75 V

  4. 4

    Read the result. Keep the unit beside the value. Use it only inside the technical boundary on this page.

Predict, then change pwm duty

Try Predict the direction of average = 5.00 V x duty / 100. Test another pwm duty, then compare average pwm voltage.

75 %
Chapter baseline
Average PWM voltage

Observe Duty changes the average while the fixed RC sets the smoothing time. Reset pwm duty to 75 and compare average pwm voltage.

Explain Duty changes the average while the fixed RC sets the smoothing time.

Check yourself

What should you do before trusting a moved-control result?
Answer: Predict its direction, apply the shown relationship, keep the units, and reset to the worked baseline.
What does this small model leave out?
Answer: Only pwm duty moves here. Field effects named in the technical boundary stay fixed.

Honesty note. This teaching model changes only pwm duty. It is not a field prediction.

1. Start with the physical story

A DAC holds a code-dependent level. PWM switches between two rails, and only a slow load or filter responds mainly to its time average. Filtering cannot remove switching instantly without also slowing changes.

Eddie: Average voltage, ripple, and settling are three different promises; calculate all three.

2. Name every algebra move

1

Price a DAC codeUse q=Vref/(2^N−1).

2

Convert code to voltageMultiply Vref by code/(2^N−1).

3

Average PWMMultiply duty fraction by the HIGH voltage.

4

Set filter timingUse tau=RC, fc=1/(2 pi RC), and about 5RC to settle.

5

Estimate first ripple termFind the PWM fundamental and multiply it by the RC attenuation at fPWM.

3. Reproduce the chapter case

qDAC=5/255=19.608 mV; V153=3.000 V
VPWM,avg=0.75(5)=3.750 V
tau=(10k)(0.22 uF)=2.20 ms
fc=1/(2 pi tau)=72.34 Hz; 5tau=11.0 ms
first harmonic after RC≈0.162 V peak

The filtered PWM reaches the intended average with visible residual ripple and a finite response time.

4. Try one real input

TryMove PWM duty and watch average, timing, and the first ripple term recompute together.

Duty
DAC step
DAC code 153
PWM average
HIGH time
LOW time
RC time constant
Cutoff
Five-tau settling
Switch/cutoff ratio
First harmonic before RC
First harmonic after RC

ObserveDuty changes the average and harmonic amplitude, while this fixed RC keeps the same cutoff and settling time.

ExplainThe DC term follows duty directly; the switching harmonics pass through a frequency-dependent filter, so average and ripple need separate equations.

Technical boundaries.

This ledger compares ideal DAC endpoints with the first PWM harmonic through one RC pole.

DAC
Offset, gain error, INL, DNL, output impedance, settling, and reference error are omitted.
PWM
Edge timing, load current, switch resistance, jitter, and higher harmonics remain.
Filter
The first-harmonic estimate is not total peak-to-peak ripple or a load-transient model.

Correct, not complete: this ledger does not qualify a DAC, PWM timer, filter, buffer, load, or control loop.

5. Use the result in the design

Choose DAC or PWM from required step size, ripple, response time, source current, monotonicity, and load behaviour rather than average voltage alone.

6. Record the evidence state

Record rail and reference, code or duty, PWM frequency, R and C tolerances, load, measured average, ripple bandwidth, settling criterion, and temperature.

7. Check yourself

Why is 75% PWM not a steady 3.75 V?
Answer: The pin still switches between 0 and 5 V; 3.75 V is its time average.
What does lowering the RC cutoff trade away?
Answer: It attenuates switching more strongly but increases settling time and slows commanded changes.
Is the first harmonic the total ripple?
Answer: No. Higher harmonics, load response, switching non-idealities, and transients also contribute.
Honesty boundary.

The arithmetic reproduces the named chapter outputs; it is not an analogue-output guarantee.

DAC
Offset, gain error, INL, DNL, output impedance, settling, and reference error are omitted.
PWM
Edge timing, load current, switch resistance, jitter, and higher harmonics remain.
Filter
The first-harmonic estimate is not total peak-to-peak ripple or a load-transient model.

Correct, not complete: this ledger does not qualify a DAC, PWM timer, filter, buffer, load, or control loop.

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